From: Daniel Lezcano <daniel.lezcano@linaro.org>
To: daniel.lezcano@linaro.org, tglx@linutronix.de
Cc: S32@nxp.com, linux-kernel@vger.kernel.org,
ghennadi.procopciuc@oss.nxp.com, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND
FLATTENED DEVICE TREE BINDINGS)
Subject: [PATCH v3 19/20] dt: bindings: fsl,vf610-pit: Add compatible for s32g2 and s32g3
Date: Mon, 4 Aug 2025 17:23:37 +0200 [thread overview]
Message-ID: <20250804152344.1109310-20-daniel.lezcano@linaro.org> (raw)
In-Reply-To: <20250804152344.1109310-1-daniel.lezcano@linaro.org>
The Vybrid Family is a NXP (formerly Freescale) platform having a
Programmable Interrupt Timer (PIT). This timer is an IP found also on
the NXP Automotive platform S32G2 and S32G3.
Add the compatible for those platforms to describe the timer.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
---
.../devicetree/bindings/timer/fsl,vf610-pit.yaml | 9 +++++++--
1 file changed, 7 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/timer/fsl,vf610-pit.yaml b/Documentation/devicetree/bindings/timer/fsl,vf610-pit.yaml
index bee2c35bd0e2..42e130654d58 100644
--- a/Documentation/devicetree/bindings/timer/fsl,vf610-pit.yaml
+++ b/Documentation/devicetree/bindings/timer/fsl,vf610-pit.yaml
@@ -15,8 +15,13 @@ description:
properties:
compatible:
- enum:
- - fsl,vf610-pit
+ oneOf:
+ - enum:
+ - fsl,vf610-pit
+ - nxp,s32g2-pit
+ - items:
+ - const: nxp,s32g3-pit
+ - const: nxp,s32g2-pit
reg:
maxItems: 1
--
2.43.0
next prev parent reply other threads:[~2025-08-04 15:24 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-08-04 15:23 [PATCH v3 00/20] Add support for the NXP automotive S32G PIT Daniel Lezcano
2025-08-04 15:23 ` [PATCH v3 01/20] clocksource/drivers/vf-pit: Replace raw_readl/writel to reald/writel Daniel Lezcano
2025-08-04 16:59 ` Arnd Bergmann
2025-08-05 14:05 ` Rob Herring
2025-08-04 15:23 ` [PATCH v3 02/20] clocksource/drivers/vf-pit: Add COMPILE_TEST option Daniel Lezcano
2025-08-04 15:23 ` [PATCH v3 03/20] clocksource/drivers/vf-pit: Set the scene for multiple timers Daniel Lezcano
2025-08-04 15:23 ` [PATCH v3 04/20] clocksource/drivers/vf-pit: Rework the base address usage Daniel Lezcano
2025-08-04 15:23 ` [PATCH v3 05/20] clocksource/drivers/vf-pit: Pass the cpu number as parameter Daniel Lezcano
2025-08-04 15:23 ` [PATCH v3 06/20] clocksource/drivers/vf-pit: Encapsulate the initialization of the cycles_per_jiffy Daniel Lezcano
2025-08-04 15:23 ` [PATCH v3 07/20] clocksource/drivers/vf-pit: Allocate the struct timer at init time Daniel Lezcano
2025-08-04 15:23 ` [PATCH v3 08/20] clocksource/drivers/vf-pit: Convert raw values to BIT macros Daniel Lezcano
2025-08-04 15:23 ` [PATCH v3 09/20] clocksource/drivers/vf-pit: Register the clocksource from the driver Daniel Lezcano
2025-08-04 15:23 ` [PATCH v3 10/20] clocksource/drivers/vf-pit: Encapsulate the macros Daniel Lezcano
2025-08-04 15:23 ` [PATCH v3 11/20] clocksource/drivers/vf-pit: Encapsulate the PTLCVAL macro Daniel Lezcano
2025-08-04 15:23 ` [PATCH v3 12/20] clocksource/drivers/vf-pit: Use the node name for the interrupt and timer names Daniel Lezcano
2025-08-04 15:23 ` [PATCH v3 13/20] clocksource/drivers/vf-pit: Encapsulate clocksource enable / disable Daniel Lezcano
2025-08-04 15:23 ` [PATCH v3 14/20] clocksource/drivers/vf-pit: Enable and disable module on error Daniel Lezcano
2025-08-04 15:23 ` [PATCH v3 15/20] clocksource/drivers/vf-pit: Encapsulate set counter function Daniel Lezcano
2025-08-04 15:23 ` [PATCH v3 16/20] clocksource/drivers/vf-pit: Consolidate calls to pit_*_disable/enable Daniel Lezcano
2025-08-04 15:23 ` [PATCH v3 17/20] clocksource/drivers/vf-pit: Unify the function name for irq ack Daniel Lezcano
2025-08-04 15:23 ` [PATCH v3 18/20] clocksource/drivers/vf-pit: Rename the VF PIT to NXP PIT Daniel Lezcano
2025-08-04 15:23 ` Daniel Lezcano [this message]
2025-08-05 14:04 ` [PATCH v3 19/20] dt: bindings: fsl,vf610-pit: Add compatible for s32g2 and s32g3 Rob Herring (Arm)
2025-08-05 14:22 ` Daniel Lezcano
2025-08-04 15:23 ` [PATCH v3 20/20] clocksource/drivers/nxp-pit: Add NXP Automotive s32g2 / s32g3 support Daniel Lezcano
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20250804152344.1109310-20-daniel.lezcano@linaro.org \
--to=daniel.lezcano@linaro.org \
--cc=S32@nxp.com \
--cc=conor+dt@kernel.org \
--cc=devicetree@vger.kernel.org \
--cc=ghennadi.procopciuc@oss.nxp.com \
--cc=krzk+dt@kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=robh@kernel.org \
--cc=tglx@linutronix.de \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox
all inboxes | Powered by JetHome®