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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 06 Aug 2025 20:47:29.2877 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 6f1de29d-41a3-45ae-4960-08ddd52a7589 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000E9D8.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY8PR12MB7291 For shadow stack support in SVM when using SEV-ES, the guest kernel needs to save XSS to the GHCB in order for the hypervisor to determine the XSAVES save area size. This series can be applied independently of the hypervisor series in order to support non-KVM hypervisors. John Allen (2): x86/boot: Move boot_*msr helpers to asm/shared/msr.h x86/sev-es: Include XSS value in GHCB CPUID request arch/x86/boot/compressed/sev.c | 7 ++++--- arch/x86/boot/compressed/sev.h | 6 +++--- arch/x86/boot/cpucheck.c | 16 ++++++++-------- arch/x86/boot/msr.h | 26 -------------------------- arch/x86/coco/sev/vc-shared.c | 11 +++++++++++ arch/x86/include/asm/shared/msr.h | 15 +++++++++++++++ arch/x86/include/asm/svm.h | 1 + 7 files changed, 42 insertions(+), 40 deletions(-) delete mode 100644 arch/x86/boot/msr.h -- 2.34.1