From: Daniel Lezcano <daniel.lezcano@linaro.org>
To: ukleinek@kernel.org, robh@kernel.org, krzk+dt@kernel.org,
conor+dt@kernel.org, Frank.Li@nxp.com
Cc: linux-pwm@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, Ghennadi.Procopciuc@nxp.com,
s32@nxp.com
Subject: [PATCH v3 0/2] Add the s32g2 and s32g3 FTM PWM support
Date: Tue, 12 Aug 2025 22:00:34 +0200 [thread overview]
Message-ID: <20250812200036.3432917-1-daniel.lezcano@linaro.org> (raw)
The NXP Automotive platform s32g2 and s32g3 have on their board a
FlexTimer (FTM) dedicated for the PWM. The same IP is found on the
Freescale Vybrid Family and the i.MX8 SoCs. However, there is a small
difference with some registers not available on the s32g2/3 and 6
channels instead of 8.
These two patches provide the DT bindings for the s32g2/3 compatible
strings and the code to deal with the FTM difference.
Changelog:
v3:
- Fixed dt-bindings subject prefix
v2:
- Merged the two booleans for the regmap holes check
- Clarified why this is needed in the changelog
v1:
- Initial post
Daniel Lezcano (1):
dt-bindings: pwm: fsl,vf610-ftm-pwm: Add compatible for s32g2 and
s32g3
Ghennadi Procopciuc (1):
pwm: Add the S32G support in the Freescale FTM driver
.../bindings/pwm/fsl,vf610-ftm-pwm.yaml | 11 ++++--
drivers/pwm/pwm-fsl-ftm.c | 35 +++++++++++++++++--
2 files changed, 41 insertions(+), 5 deletions(-)
--
2.43.0
next reply other threads:[~2025-08-12 20:01 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-08-12 20:00 Daniel Lezcano [this message]
2025-08-12 20:00 ` [PATCH v3 1/2] dt-bindings: pwm: fsl,vf610-ftm-pwm: Add compatible for s32g2 and s32g3 Daniel Lezcano
2025-08-13 17:04 ` Conor Dooley
2025-08-12 20:00 ` [PATCH v3 2/2] pwm: Add the S32G support in the Freescale FTM driver Daniel Lezcano
2025-08-14 10:54 ` [PATCH v3 0/2] Add the s32g2 and s32g3 FTM PWM support Uwe Kleine-König
2025-08-14 13:23 ` Daniel Lezcano
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