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Bae" To: x86@kernel.org Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de, dave.hansen@linux.intel.com, colinmitchell@google.com, chao.gao@intel.com, abusse@amazon.de, chang.seok.bae@intel.com, linux-kernel@vger.kernel.org Subject: [PATCH v4 0/6] x86: Support for Intel Microcode Staging Feature Date: Wed, 13 Aug 2025 10:26:43 -0700 Message-ID: <20250813172649.15474-1-chang.seok.bae@intel.com> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20250409232713.4536-1-chang.seok.bae@intel.com> References: <20250409232713.4536-1-chang.seok.bae@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Dear x86 maintainers, This is another posting of the series, now including a Tested-by tag. There are no code changes. The use case for this feature is late-loading with increased load times, most likely in cloud service environments. I reached out to potential users for reviews and feedback, and Anselm Busse has confirmed his testing. While additional reviews or endorsements could help ease the maintainers' burden and build confidence, there hasn't been much recent traction. At this point, I believe it's better to move forward and get a clear assessment from the maintainers -- either to prompt more engagement from prospective users or to determine its readiness for merging. Of course, I appreciate any further feedback on this set. As usual, the patch series is based on tip/master and is also available in this repo: git://github.com/intel-staging/microcode.git staging_v4 Last posting (V3): https://lore.kernel.org/lkml/20250409232713.4536-1-chang.seok.bae@intel.com/ Thanks, Chang Chang S. Bae (6): x86/microcode: Introduce staging step to reduce late-loading time x86/microcode/intel: Establish staging control logic x86/microcode/intel: Define staging state struct x86/microcode/intel: Implement staging handler x86/microcode/intel: Support mailbox transfer x86/microcode/intel: Enable staging when available arch/x86/include/asm/msr-index.h | 9 + arch/x86/include/asm/topology.h | 1 + arch/x86/kernel/cpu/microcode/core.c | 11 + arch/x86/kernel/cpu/microcode/intel.c | 338 +++++++++++++++++++++++ arch/x86/kernel/cpu/microcode/internal.h | 4 +- 5 files changed, 362 insertions(+), 1 deletion(-) base-commit: ca76508b9352e8c770b58213cc6c4700e459b7c2 -- 2.48.1