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client-ip=165.204.84.17; helo=SATLEXMB03.amd.com; pr=C Received: from SATLEXMB03.amd.com (165.204.84.17) by SJ1PEPF000023D5.mail.protection.outlook.com (10.167.244.70) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.9052.0 via Frontend Transport; Thu, 14 Aug 2025 07:11:13 +0000 Received: from SATLEXMB06.amd.com (10.181.40.147) by SATLEXMB03.amd.com (10.181.40.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.39; Thu, 14 Aug 2025 02:11:08 -0500 Received: from SATLEXMB04.amd.com (10.181.40.145) by SATLEXMB06.amd.com (10.181.40.147) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.39; Thu, 14 Aug 2025 02:11:07 -0500 Received: from xhdvineethc40.xilinx.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server id 15.1.2507.39 via Frontend Transport; Thu, 14 Aug 2025 02:11:04 -0500 From: Vineeth Karumanchi To: , , , , , , , CC: , , Subject: [PATCH v2 net-next 0/2] net: macb: Add TAPRIO traffic scheduling support Date: Thu, 14 Aug 2025 12:40:56 +0530 Message-ID: <20250814071058.3062453-1-vineeth.karumanchi@amd.com> X-Mailer: git-send-email 2.34.1 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SJ1PEPF000023D5:EE_|MW3PR12MB4489:EE_ X-MS-Office365-Filtering-Correlation-Id: 32adc4eb-3329-4cd4-3c6f-08dddb01c129 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|82310400026|376014|36860700013|1800799024; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 14 Aug 2025 07:11:13.7285 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 32adc4eb-3329-4cd4-3c6f-08dddb01c129 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB03.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SJ1PEPF000023D5.namprd21.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MW3PR12MB4489 Implement Time-Aware Traffic Scheduling (TAPRIO) offload support for Cadence MACB/GEM ethernet controllers to enable IEEE 802.1Qbv compliant time-sensitive networking (TSN) capabilities. Key features implemented: - Complete TAPRIO qdisc offload infrastructure with TC_SETUP_QDISC_TAPRIO - Hardware-accelerated time-based gate control for multiple queues - Enhanced Scheduled Traffic (ENST) register configuration and management - Gate state scheduling with configurable start times, on/off intervals - Support for cycle-time based traffic scheduling with validation - Hardware capability detection via MACB_CAPS_QBV flag - Robust error handling and parameter validation - Queue-specific timing register programming (ENST_START_TIME, ENST_ON_TIME, ENST_OFF_TIME) Changes include: - Add enst_ns_to_hw_units(): Converts nanoseconds to hardware units - Add enst_max_hw_interval(): Returns max interval for given speed - Add macb_taprio_setup_replace() for TAPRIO configuration - Add macb_taprio_destroy() for cleanup and reset - Add macb_setup_tc() as TC offload entry point - Enable NETIF_F_HW_TC feature for QBV-capable hardware - Add ENST register offsets to queue configuration The implementation validates timing constraints against hardware limits, supports per-queue gate mask configuration, and provides comprehensive logging for debugging and monitoring. Hardware registers are programmed atomically with proper locking to ensure consistent state. Tested on Xilinx Versal platforms with QBV-capable MACB controllers. Signed-off-by: Vineeth Karumanchi --- v2: - Merged patches as per the suggestion - Removed GEM_ENST_DISABLE_QUEUE() and GEM_ENST_ENABLE_QUEUE() - Renamed queue_enst_config/macb_queue_enst_config, reordered elements to reduce padding - Moved queue->ENST_* params outside of if (hw_q) block for clarity - Cleaned up extra spaces and fixed indentation - Removed redundant num_queues check in macb_taprio_setup_replace() - leveraged scope_guard as per netdev coding style - Eliminated redundant ENST_CONTROL register read for ENST state - Used bp->queue_mask to generate ENST control mask - Applied standard queue iteration logic in macb_taprio_destroy() - Added HW offload support check in macb_taprio_setup() - Added runtime state check in macb_taprio_setup() - Resolved 32 bit compilation issue and clang errors - Fixed CAPS syntax and resolved related clang error - Wrapped capability lines to stay within 80-column limit v1: https://lore.kernel.org/netdev/20250722154111.1871292-1-vineeth.karumanchi@amd.com/ --- Vineeth Karumanchi (2): net: macb: Add TAPRIO traffic scheduling support net: macb: Add capability-based QBV detection and Versal support drivers/net/ethernet/cadence/macb.h | 67 +++++++ drivers/net/ethernet/cadence/macb_main.c | 232 ++++++++++++++++++++++- 2 files changed, 297 insertions(+), 2 deletions(-) -- 2.34.1