From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from zg8tmja5ljk3lje4mi4ymjia.icoremail.net (zg8tmja5ljk3lje4mi4ymjia.icoremail.net [209.97.182.222]) by smtp.subspace.kernel.org (Postfix) with ESMTP id E82E8192D97; Fri, 15 Aug 2025 09:36:07 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.97.182.222 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1755250571; cv=none; b=pCYz1mR1vFl28IZ3x18j4+oClQ8VELgwsdP28U309+/H5lns9iaD/iN30KdtyLshUFZU/CxF+uWk4DBoWbVTIwDSVh9zjHMZ9xwTkogqwI7w1LC5AZ4Vc/tFrKPET10lCGtnaYnbNX9Bk/5HxwuZzVhB4+u67pG5JH4kQ+S7J0g= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1755250571; c=relaxed/simple; bh=xCrzwTtukmApHlzLgvOkumWzJgSzcKNdfEs8OU3tVYg=; h=From:To:Cc:Subject:Date:Message-Id:MIME-Version; b=k20MS1ID1v/c0LrzuEQSeP51wFHBWCWqFJO1uExLhv0IhWmyo/S8cHJNgEnA24WwU9SDZu47jLn3qSU/FX6HRxycy/EFFa4INCrfyX1IaMPJermOq/otfIJpmHT4netuMRL2LhLsa2HFmjeWrz73ES4+ZIQqtsY5mw0cHfyvzjg= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=eswincomputing.com; spf=pass smtp.mailfrom=eswincomputing.com; arc=none smtp.client-ip=209.97.182.222 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=eswincomputing.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=eswincomputing.com Received: from E0005152DT.eswin.cn (unknown [10.12.96.41]) by app1 (Coremail) with SMTP id TAJkCgAHHxB1_55ouQy_AA--.59061S2; Fri, 15 Aug 2025 17:35:51 +0800 (CST) From: dongxuyang@eswincomputing.com To: mturquette@baylibre.com, sboyd@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, paul.walmsley@sifive.com, palmer@dabbelt.com, aou@eecs.berkeley.edu, alex@ghiti.fr, linux-riscv@lists.infradead.org Cc: ningyu@eswincomputing.com, linmin@eswincomputing.com, huangyifeng@eswincomputing.com, pinkesh.vaghela@einfochips.com, Xuyang Dong Subject: [PATCH v4 0/3] Add driver support for ESWIN eic700 SoC clock controller Date: Fri, 15 Aug 2025 17:35:39 +0800 Message-Id: <20250815093539.975-1-dongxuyang@eswincomputing.com> X-Mailer: git-send-email 2.31.1.windows.1 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-CM-TRANSID:TAJkCgAHHxB1_55ouQy_AA--.59061S2 X-Coremail-Antispam: 1UD129KBjvJXoWxAF15GF15Cw1UGrW3Kr4kJFb_yoW5KF45pF 4kCr98Cr1qgryxXan7ta4IgFyrZanxXFWjkryxXw15Z3429a4vyF4ftFy5AF97Ar1fAw1D tr1aga10kF4UZaDanT9S1TB71UUUUU7qnTZGkaVYY2UrUUUUjbIjqfuFe4nvWSU5nxnvy2 9KBjDU0xBIdaVrnRJUUUBv14x267AKxVW5JVWrJwAFc2x0x2IEx4CE42xK8VAvwI8IcIk0 rVWrJVCq3wAFIxvE14AKwVWUJVWUGwA2ocxC64kIII0Yj41l84x0c7CEw4AK67xGY2AK02 1l84ACjcxK6xIIjxv20xvE14v26w1j6s0DM28EF7xvwVC0I7IYx2IY6xkF7I0E14v26r4U JVWxJr1l84ACjcxK6I8E87Iv67AKxVW0oVCq3wA2z4x0Y4vEx4A2jsIEc7CjxVAFwI0_Gc CE3s1le2I262IYc4CY6c8Ij28IcVAaY2xG8wAqx4xG64xvF2IEw4CE5I8CrVC2j2WlYx0E 2Ix0cI8IcVAFwI0_JrI_JrylYx0Ex4A2jsIE14v26r1j6r4UMcvjeVCFs4IE7xkEbVWUJV W8JwACjcxG0xvY0x0EwIxGrwACjI8F5VA0II8E6IAqYI8I648v4I1lFIxGxcIEc7CjxVA2 Y2ka0xkIwI1lw4CEc2x0rVAKj4xxMxkF7I0En4kS14v26r4a6rW5MxkIecxEwVCm-wCF04 k20xvY0x0EwIxGrwCFx2IqxVCFs4IE7xkEbVWUJVW8JwC20s026c02F40E14v26r1j6r18 MI8I3I0E7480Y4vE14v26r106r1rMI8E67AF67kF1VAFwI0_GFv_WrylIxkGc2Ij64vIr4 1lIxAIcVC0I7IYx2IY67AKxVWUJVWUCwCI42IY6xIIjxv20xvEc7CjxVAFwI0_Gr0_Cr1l IxAIcVCF04k26cxKx2IYs7xG6r1j6r1xMIIF0xvEx4A2jsIE14v26r1j6r4UMIIF0xvEx4 A2jsIEc7CjxVAFwI0_Gr0_Gr1UYxBIdaVFxhVjvjDU0xZFpf9x0pRuHqcUUUUU= X-CM-SenderInfo: pgrqw5xx1d0w46hv4xpqfrz1xxwl0woofrz/ From: Xuyang Dong This series depends on the vendor prefix patch [1] and config option patch [2]. [1] https://lore.kernel.org/all/20250616112316.3833343-4-pinkesh.vaghela@einfochips.com/ [2] https://lore.kernel.org/all/20250616112316.3833343-3-pinkesh.vaghela@einfochips.com/ Updates: Changes in v4: - Updated YAML file - Changed name from cpu-default-frequency to cpu-default-freq-hz. - Dropped $ref of cpu-default-frequency. - Added cpu-default-frequency for required. - Removed cpu-default-frequency in updated file, because there was no need to add cpu-default-frequency. - Moved DIVIDER to DIV. - Arranged the IDs in order. - Dropped EIC7700_NR_CLKS. - Removed dt-bindings eswin,eic7700-clock.h. Because IDs was not used, and used clock device nodes. - According to the updated driver codes, the YAML has been updated. - Updated driver file - Remove undocumented parameters "cpu_no_boost_1_6ghz" and "cpu-default-frequency". - Modified the comment and used the correct Linux coding style. - Removed codes of voltage, because it was not the clock driver. - Updated the formula of clock frequency calculation. Removed the logic that only used register selection. - Used CLK_OF_DECLARE() to register clocks. Registered pll-clock, mux-clock, divider-clock, and gate-clock in clk-eic7700.c. The specific implementation of clock registration was in clk.c. - Added eic7700-clocks.dtsi. - Moved device information to DTS. Put all clocks' node in the eic7700-clocks.dtsi. - Link to v3: https://lore.kernel.org/all/20250624103212.287-1-dongxuyang@eswincomputing.com/ Changes in v3: - Update example, drop child node and add '#clock-cells' to the parent node. - Change parent node from sys-crg to clock-controller for this yaml. - Drop "syscon", "simple-mfd" to clear warnings/errors by using "make dt_binding_check". And these are not necessary. - Add "cpu-default-frequency" definition in yaml for "undocumented ABI". - Drop Reviewed-by, this is misunderstanding. We have not received such an email. - Link to v2: https://lore.kernel.org/all/20250523090747.1830-1-dongxuyang@eswincomputing.com/ Changes in v2: - Update example, drop child node. - Clear warnings/errors for using "make dt_binding_check". - Change to the correct format. - Drop some non-stanard code. - Use dev_err_probe() in probe functions. - Link to v1: https://lore.kernel.org/all/20250514002233.187-1-dongxuyang@eswincomputing.com/ Xuyang Dong (3): clock: eswin: Documentation for eic7700 SoC clock: eswin: Add eic7700 clock driver riscv: dts: eswin: Add clock driver support .../bindings/clock/eswin,eic7700-clock.yaml | 381 +++ arch/riscv/boot/dts/eswin/eic7700-clocks.dtsi | 2283 +++++++++++++++++ drivers/clk/Kconfig | 1 + drivers/clk/Makefile | 1 + drivers/clk/eswin/Kconfig | 10 + drivers/clk/eswin/Makefile | 8 + drivers/clk/eswin/clk-eic7700.c | 44 + drivers/clk/eswin/clk.c | 734 ++++++ drivers/clk/eswin/clk.h | 69 + 9 files changed, 3531 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/eswin,eic7700-clock.yaml create mode 100644 arch/riscv/boot/dts/eswin/eic7700-clocks.dtsi create mode 100644 drivers/clk/eswin/Kconfig create mode 100644 drivers/clk/eswin/Makefile create mode 100644 drivers/clk/eswin/clk-eic7700.c create mode 100644 drivers/clk/eswin/clk.c create mode 100644 drivers/clk/eswin/clk.h -- 2.17.1