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Mon, 18 Aug 2025 02:24:23 -0700 From: Kartik Rajput To: , , , , , , , , , , , , CC: Subject: [PATCH v4 0/5] Add I2C support for Tegra264 Date: Mon, 18 Aug 2025 14:54:06 +0530 Message-ID: <20250818092412.444755-1-kkartik@nvidia.com> X-Mailer: git-send-email 2.43.0 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CO1PEPF000042AA:EE_|DS0PR12MB8527:EE_ X-MS-Office365-Filtering-Correlation-Id: 88d66247-e9f9-4b37-b93f-08ddde390e23 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|7416014|36860700013|376014|82310400026|1800799024|921020; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?fkrdZ0uvWWUE/t/AjVlmnHMf0uK6k9OpuYQ7zMhHbUP5Qmc55gQUELlVn0zs?= =?us-ascii?Q?IWbENoQs5gZW6jZtk1g6698CR2oTkxRZsugJvQYwLO7QJqsaVyBxlV3kHe3x?= =?us-ascii?Q?Cf3ESw0x06JlpgGtjNuc1yI848USOVHDpTlCFXw9OkP7ltJcCqNKqKxd4T78?= =?us-ascii?Q?Ku6ayH1DR7Vv2GSEZ3P/n+2JbHgOKRS0peHgMM4LrXNKzgmNyr2BnuaYFpTe?= =?us-ascii?Q?3sxa8YhM98F2rdOqkTH1e3im9ygg3tp0ts9wDh/w799F54QTZTJQ9GEVXLrz?= =?us-ascii?Q?6zFTRs2/ypYck5Jfh9ja65mV0mc0cfAGxVSw3JtrC36kZ4VxxZRpgwnhj1Zb?= =?us-ascii?Q?vmhkeS8cwpcTIUw3DEytkqsSqKc/iQ4hqLNa9WKsR6HiYHgxhSH7DOSADa9q?= =?us-ascii?Q?5v9FXj9XIxzfGspQCjQUvy0mqVANqNpA+f2Lh2uRsZrl6pzFmr6VVsX/wS7N?= =?us-ascii?Q?xv7q3aKFoDBAt8S9bDLUkcXKpGGY8RDxrDKRK/xwa61569zHelyIPYlwEnIh?= =?us-ascii?Q?Hp+bYLpF1ZiJRafvqUkA6t67cDPHHw7pG5szgO6Tsv8e168pLLoa1k24ZSFK?= =?us-ascii?Q?lFIi3r6lvo9pX8mb8ORDH7hNeNUY/qH1hjjvJoGb/KyqEP7V8K03SeeqrnWn?= =?us-ascii?Q?lj4fW5LURgD7BA4R+0ytHDlB+1tnQ7PvggON4nikTOnjTrmFfV1hIrNCkiMh?= =?us-ascii?Q?6kQCN1WnlTdXDMIEEp4h0YnswKivdsFc7WQhTot10Afho0akGVuADksg51OS?= =?us-ascii?Q?OKsmvHbej7b3j0LRSrj2jw0qnUGgIHc81J0UO8zBQ9XllhfR8s2xd/42VudT?= =?us-ascii?Q?Z4QfyLnLbvI2+Duf2x6Ttx0+X0NvQi2n47pegrasFjvA8+Gucq1uOEP8fJt2?= =?us-ascii?Q?ujGnWikWmH6uZk5o4DdkhacgRpjUofpOWw5ueZiPxwGKQiGKQVrhr/TBM1PB?= =?us-ascii?Q?2xOQDrNNeSG7ttWCAOEmt3ocHQ9eSFib7kxppNZWoSNI5cTQnLTbGiM1DOAU?= =?us-ascii?Q?qwF0YChs9/MhIuuPYNrKOpy4QodZ5TmYmP3934NWXzj2TdEBBqluZmxChYrU?= =?us-ascii?Q?qL3Ozwfd1BkOVxFoqDHrh3I1ffMdZq947hnAULLn9cTk/t64e7Q8s7SoZnJF?= =?us-ascii?Q?6P0ZArtJIn9foEflwNdN+y0iO1LINSW+G07LguZYNEKg+EE4Bawl0hkRJysK?= =?us-ascii?Q?f9KL24HEghnZLFNm/yOnMSYdvI4n7O9Pymks/jjIFMyt2y4g8J3VNsfrG9WN?= =?us-ascii?Q?+hzKAZjLwtdmuSNP8cawb5k3HV8J8jh1aeYuJKgMJFWUtDgPCXlpXD0mAEiB?= =?us-ascii?Q?n90xDAoSHZWpmKqBhA3VbzNY3s3VGGYKQyBYWyokbSGqQ/f7CMxT51ihCyzb?= =?us-ascii?Q?ufUrxF28u6fFr8aAMZbXIOcxIYOap18OgfEWUhpZug2xT58lSZKhy/P2z3Fq?= =?us-ascii?Q?bIOIoJw168QeT07I8kmxcfUA96LVdc4G19dZagllwl4oMgDVKrCheb56Vf+v?= =?us-ascii?Q?Fi5B1qaCZHKSWD/GhtsoL2DTfASUiVdeKFm0H2+s2RDx+uA5rRHLb0bh6A?= =?us-ascii?Q?=3D=3D?= X-Forefront-Antispam-Report: CIP:216.228.117.160;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge1.nvidia.com;CAT:NONE;SFS:(13230040)(7416014)(36860700013)(376014)(82310400026)(1800799024)(921020);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 18 Aug 2025 09:24:38.7261 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 88d66247-e9f9-4b37-b93f-08ddde390e23 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.160];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CO1PEPF000042AA.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS0PR12MB8527 Following series of patches add support for Tegra264 and High Speed (HS) Mode in i2c-tegra.c driver. Akhil R (2): i2c: tegra: Add HS mode support i2c: tegra: Add Tegra264 support Kartik Rajput (3): dt-bindings: i2c: nvidia,tegra20-i2c: Document Tegra264 I2C i2c: tegra: Do not configure DMA if not supported i2c: tegra: Add support for SW mutex register .../bindings/i2c/nvidia,tegra20-i2c.yaml | 7 + drivers/i2c/busses/i2c-tegra.c | 153 ++++++++++++++++++ 2 files changed, 160 insertions(+) -- 2.43.0