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[129.46.96.20]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-76e7d4f7cf7sm1998291b3a.69.2025.08.19.02.52.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 19 Aug 2025 02:52:44 -0700 (PDT) From: Wenbin Yao Subject: [PATCH 0/4] PCI: qcom: Add support for Glymur PCIe Gen5x4 Date: Tue, 19 Aug 2025 02:52:04 -0700 Message-Id: <20250819-glymur_pcie5-v1-0-2ea09f83cbb0@oss.qualcomm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit X-B4-Tracking: v=1; b=H4sIAERJpGgC/5WMywqDMBQFf0WybiQP46Or/keRYuKNBtTYpEpF/ PdG6a7topsDc2BmRR6cAY/O0YoczMYbOwSgpwipthoawKYOjBhhguQ0x0239JO7jcqAwLVMQBP OgHGOgjI60OZ55K5l4Nb4h3XLUZ/p/v4IzRQTnBUSdMalSFVysd7H96nqlO37OMyef7vFF1dnu iKMUikz/a8rEg1pASAZkZ9uuW3bC53ppuknAQAA X-Change-ID: 20250818-glymur_pcie5-db4ef032e233 To: Vinod Koul , Kishon Vijay Abraham I , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Helgaas , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84ski?= , Manivannan Sadhasivam , Bjorn Andersson Cc: linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org, Wenbin Yao , konrad.dybcio@oss.qualcomm.com, qiang.yu@oss.qualcomm.com, Prudhvi Yarlagadda X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1755597163; l=1518; i=wenbin.yao@oss.qualcomm.com; s=20250806; h=from:subject:message-id; bh=38N9I0VKimRfRVnSSj6djIRevZawE7ZVJqiqrTU4J9c=; b=02RxM9rKPE1R1Nls2PZIH1ASO0SdWMzgA94+HFc7dUqJpc1XOl66Objos0mlbgQbHDrb9KAmJ 6FRtmuG8KDeB9tPlMz02LBa2wEqxsntUipQ+k5undh32so5apmj6XXd X-Developer-Key: i=wenbin.yao@oss.qualcomm.com; a=ed25519; pk=nBPq+51QejLSupTaJoOMvgFbXSyRVCJexMZ+bUTG5KU= X-Proofpoint-ORIG-GUID: OiMlTTawuoUu5liHnPJerocOAmrwQ3Zq X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwODE2MDAyMCBTYWx0ZWRfX9driiHT1Ai+z Qd76UkkWGzHU+2arq/zDYbEJHSbDbxQTV12d0BXi/bLVp88Q0HPvKZXMmWcjstg8/jOvCsiqkU+ I+t8T/449cMCqFA3vd+WMVmVRtdWJXkCBvPp9qwMOWdop6koOkCoulC9XCuP2O9B0udiLBzL4DF XKV374xk6lNCYzT+oEB62hBPauiEN77H5C5c8nn7Qu3BPseq7PCJ/JFcclbsDw6i6v1pvf+hosq 469z8ElQHvJ6ooAg4uDuuxkcjSBXWZnVIND1QjiFkNNsL29XgJ6adTYhNnMaw0fZUsALmz/vVrs idXyaj4fWaJI3lyrVRuDS9z4RYlSDAwT3vY+g2fUBaU9Al+SeMxfTyvxtoWw2GpyYLJw9iGUD2w 31IpgCNM X-Authority-Analysis: v=2.4 cv=a+Mw9VSF c=1 sm=1 tr=0 ts=68a4496e cx=c_pps a=WW5sKcV1LcKqjgzy2JUPuA==:117 a=ouPCqIW2jiPt+lZRy3xVPw==:17 a=IkcTkHD0fZMA:10 a=2OwXVqhp2XgA:10 a=EUspDBNiAAAA:8 a=450xJL59MvcON_dSg4wA:9 a=QEXdDO2ut3YA:10 a=OpyuDcXvxspvyRM73sMx:22 X-Proofpoint-GUID: OiMlTTawuoUu5liHnPJerocOAmrwQ3Zq X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.1.9,FMLib:17.12.80.40 definitions=2025-08-19_01,2025-08-14_01,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 malwarescore=0 suspectscore=0 impostorscore=0 phishscore=0 adultscore=0 priorityscore=1501 clxscore=1011 bulkscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2507300000 definitions=main-2508160020 Glymur is the next generation compute SoC of Qualcomm. This patch series aims to add support for the fifth PCIe instance on it. The fifth PCIe instance on Glymur has a Gen5 4-lane PHY. Patch [1/4] documents PHY as a separate compatible and Patch [2/4] documents controller as a separate compatible. Patch [3/4] describles the new PCS offsets in a dedicated header file. Patch [4/4] adds configuration and compatible for PHY. The device tree changes and whatever driver patches that are not part of this patch series will be posted separately after official announcement of the SOC. Signed-off-by: Wenbin Yao --- Prudhvi Yarlagadda (4): dt-bindings: phy: qcom,sc8280xp-qmp-pcie-phy: Document the Glymur QMP PCIe PHY dt-bindings: PCI: qcom: Document the Glymur PCIe Controller phy: qcom-qmp: pcs: Add v8.50 register offsets phy: qcom: qmp-pcie: Add support for Glymur PCIe Gen5x4 PHY .../bindings/pci/qcom,pcie-x1e80100.yaml | 7 +++++- .../bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml | 3 +++ drivers/phy/qualcomm/phy-qcom-qmp-pcie.c | 29 ++++++++++++++++++++++ drivers/phy/qualcomm/phy-qcom-qmp-pcs-v8_50.h | 13 ++++++++++ drivers/phy/qualcomm/phy-qcom-qmp.h | 2 ++ 5 files changed, 53 insertions(+), 1 deletion(-) --- base-commit: 886e5e7b0432360842303d587bb4a65d10741ae8 change-id: 20250818-glymur_pcie5-db4ef032e233 Best regards, -- Wenbin Yao