Re: [PATCH v3 2/2] drm: bridge: Add TI tmds181 and sn65dp159 driver

[kernel test robot <lkp@intel.com>]

Hi Mike,

kernel test robot noticed the following build warnings:

[auto build test WARNING on 53e760d8949895390e256e723e7ee46618310361]

url:    https://github.com/intel-lab-lkp/linux/commits/Mike-Looijmans/dt-bindings-drm-bridge-ti-tmds181-Add-TI-TMDS181-and-SN65DP159-bindings/20250820-224316
base:   53e760d8949895390e256e723e7ee46618310361
patch link:    https://lore.kernel.org/r/20250820144128.17603-3-mike.looijmans%40topic.nl
patch subject: [PATCH v3 2/2] drm: bridge: Add TI tmds181 and sn65dp159 driver
config: loongarch-allyesconfig (https://download.01.org/0day-ci/archive/20250821/202508211421.aYwuLvvk-lkp@intel.com/config)
compiler: clang version 22.0.0git (https://github.com/llvm/llvm-project 93d24b6b7b148c47a2fa228a4ef31524fa1d9f3f)
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20250821/202508211421.aYwuLvvk-lkp@intel.com/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202508211421.aYwuLvvk-lkp@intel.com/

All warnings (new ones prefixed by >>):

>> drivers/gpu/drm/bridge/ti-tmds181.c:292:9: warning: cast to smaller integer type 'enum tmds181_chip' from 'const void *' [-Wvoid-pointer-to-enum-cast]
     292 |         chip = (enum tmds181_chip)of_device_get_match_data(&client->dev);
         |                ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   1 warning generated.


vim +292 drivers/gpu/drm/bridge/ti-tmds181.c

   252	
   253	static int tmds181_probe(struct i2c_client *client)
   254	{
   255		struct tmds181_data *data;
   256		struct gpio_desc *oe_gpio;
   257		enum tmds181_chip chip;
   258		int ret;
   259		u32 param;
   260		u8 val;
   261	
   262		/* Check if the adapter supports the needed features */
   263		if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA))
   264			return -EIO;
   265	
   266		data = devm_drm_bridge_alloc(&client->dev, struct tmds181_data, bridge,
   267					     &tmds181_bridge_funcs);
   268		if (IS_ERR(data))
   269			return PTR_ERR(data);
   270	
   271		data->client = client;
   272		i2c_set_clientdata(client, data);
   273		data->regmap = devm_regmap_init_i2c(client, &tmds181_regmap_config);
   274		if (IS_ERR(data->regmap))
   275			return PTR_ERR(data->regmap);
   276	
   277		/* The "OE" pin acts as a reset */
   278		oe_gpio = devm_gpiod_get_optional(&client->dev, "oe", GPIOD_OUT_LOW);
   279		if (IS_ERR(oe_gpio)) {
   280			ret = PTR_ERR(oe_gpio);
   281			if (ret != -EPROBE_DEFER)
   282				dev_err(&client->dev, "failed to acquire 'oe' gpio\n");
   283			return ret;
   284		}
   285		if (oe_gpio) {
   286			/* Need at least 100us reset pulse */
   287			usleep_range(100, 200);
   288			gpiod_set_value_cansleep(oe_gpio, 1);
   289		}
   290	
   291		/* Reading the ID also provides enough time for the reset */
 > 292		chip = (enum tmds181_chip)of_device_get_match_data(&client->dev);
   293		ret = tmds181_check_id(data, &chip);
   294		if (ret)
   295			return ret;
   296	
   297		/*
   298		 * We take care of power control, so disable the chips PM functions, and
   299		 * allow the DDC to run at 400kHz
   300		 */
   301		regmap_update_bits(data->regmap, TMDS181_REG_CTRL9,
   302				TMDS181_CTRL9_SIG_EN | TMDS181_CTRL9_PD_EN |
   303				TMDS181_CTRL9_HPD_AUTO_PWRDWN_DISABLE |
   304				TMDS181_CTRL9_I2C_DR_CTL,
   305				TMDS181_CTRL9_PD_EN |
   306				TMDS181_CTRL9_HPD_AUTO_PWRDWN_DISABLE |
   307				TMDS181_CTRL9_I2C_DR_CTL);
   308	
   309		/* Apply configuration changes */
   310		if (of_property_read_bool(client->dev.of_node, "ti,source-mode"))
   311			regmap_update_bits(data->regmap, TMDS181_REG_CTRLA,
   312					   TMDS181_CTRLA_MODE_SINK, 0);
   313		if (of_property_read_bool(client->dev.of_node, "ti,sink-mode"))
   314			regmap_update_bits(data->regmap, TMDS181_REG_CTRLA,
   315					   TMDS181_CTRLA_MODE_SINK, TMDS181_CTRLA_MODE_SINK);
   316	
   317		/*
   318		 * Using the automatic modes of the chip uses considerable power as it
   319		 * will keep the PLL running at all times. So instead, define our own
   320		 * threshold for the pixel rate. This also allows to use a sane default
   321		 * of 200MHz pixel rate for the redriver-retimer crossover point, as the
   322		 * modes below 3k don't show any benefit from the retimer.
   323		 */
   324		data->retimer_threshold_khz = 200000;
   325		if (!of_property_read_u32(client->dev.of_node,
   326					  "ti,retimer-threshold-hz", &param))
   327			data->retimer_threshold_khz = param / 1000;
   328	
   329		/* Default to low-power redriver mode */
   330		regmap_update_bits(data->regmap, TMDS181_REG_CTRLA,
   331				   TMDS181_CTRLA_DEV_FUNC_MODE, 0x00);
   332	
   333		if (of_property_read_bool(client->dev.of_node, "ti,adaptive-equalizer"))
   334			regmap_update_bits(data->regmap, TMDS181_REG_CTRLA,
   335					   TMDS181_CTRLA_EQ_EN | TMDS181_CTRLA_EQ_ADA_EN,
   336					   TMDS181_CTRLA_EQ_EN | TMDS181_CTRLA_EQ_ADA_EN);
   337		if (of_property_read_bool(client->dev.of_node, "ti,disable-equalizer"))
   338			regmap_update_bits(data->regmap, TMDS181_REG_CTRLA,
   339					   TMDS181_CTRLA_EQ_EN | TMDS181_CTRLA_EQ_ADA_EN,
   340					   0);
   341	
   342		switch (chip) {
   343		case dp159:
   344			val = 0;
   345			if (!of_property_read_u32(client->dev.of_node,
   346						  "ti,slew-rate", &param)) {
   347				if (param > 3) {
   348					dev_err(&client->dev, "invalid slew-rate\n");
   349					return -EINVAL;
   350				}
   351				/* Implement 0 = slow, 3 = fast slew rate */
   352				val = FIELD_PREP(TMDS181_CTRLB_SLEW_CTL, (3 - param));
   353			}
   354			if (of_property_read_bool(client->dev.of_node, "ti,dvi-mode"))
   355				val |= TMDS181_CTRLB_HDMI_SEL_DVI;
   356			break;
   357		default:
   358			val = TMDS181_CTRLB_DDC_DR_SEL;
   359			break;
   360		}
   361	
   362		/* Default to low-speed termination */
   363		val |= FIELD_PREP(TMDS181_CTRLB_TX_TERM_CTL, TMDS181_CTRLB_TX_TERM_150_300_OHMS);
   364	
   365		ret = regmap_write(data->regmap, TMDS181_REG_CTRLB, val);
   366		if (ret < 0) {
   367			dev_err(&client->dev, "regmap_write(B) failed\n");
   368			return ret;
   369		}
   370	
   371		/* Find next bridge in chain */
   372		data->next_bridge = devm_drm_of_get_bridge(&client->dev, client->dev.of_node, 1, 0);
   373		if (IS_ERR(data->next_bridge))
   374			return dev_err_probe(&client->dev, PTR_ERR(data->next_bridge),
   375					     "Failed to find next bridge\n");
   376	
   377		/* Register the bridge. */
   378		data->bridge.of_node = client->dev.of_node;
   379	
   380		return devm_drm_bridge_add(&client->dev, &data->bridge);
   381	}
   382	

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