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From: Aaron Kling via B4 Relay <devnull+webgeek1234.gmail.com@kernel.org>
To: "Rafael J. Wysocki" <rafael@kernel.org>,
	 Viresh Kumar <viresh.kumar@linaro.org>,
	 Thierry Reding <thierry.reding@gmail.com>,
	 Jonathan Hunter <jonathanh@nvidia.com>,
	Aaron Kling <luceoscutum@gmail.com>,
	 Sumit Gupta <sumitg@nvidia.com>
Cc: Thierry Reding <treding@nvidia.com>,
	linux-pm@vger.kernel.org,  linux-tegra@vger.kernel.org,
	linux-kernel@vger.kernel.org,
	 Aaron Kling <webgeek1234@gmail.com>,
	 Mikko Perttunen <mperttunen@nvidia.com>
Subject: [PATCH 2/2] cpufreq: tegra186: Initialize all cores to base frequencies
Date: Tue, 26 Aug 2025 15:16:00 -0500	[thread overview]
Message-ID: <20250826-tegra186-cpufreq-fixes-v1-2-97f98d3e0adb@gmail.com> (raw)
In-Reply-To: <20250826-tegra186-cpufreq-fixes-v1-0-97f98d3e0adb@gmail.com>

From: Aaron Kling <webgeek1234@gmail.com>

During initialization, the EDVD_COREx_VOLT_FREQ registers for some cores
are still at reset values and not reflecting the actual frequency. This
causes get calls to fail. Set all cores to their respective base
frequency during probe to initialize the registers to working values.

Suggested-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Aaron Kling <webgeek1234@gmail.com>
---
 drivers/cpufreq/tegra186-cpufreq.c | 11 ++++++++++-
 1 file changed, 10 insertions(+), 1 deletion(-)

diff --git a/drivers/cpufreq/tegra186-cpufreq.c b/drivers/cpufreq/tegra186-cpufreq.c
index 6c394b429b6182faffabf222e5af501393dbbba9..ef288705f00b0918d0f8963ef9cc9fc53be88091 100644
--- a/drivers/cpufreq/tegra186-cpufreq.c
+++ b/drivers/cpufreq/tegra186-cpufreq.c
@@ -229,7 +229,8 @@ static int tegra186_cpufreq_probe(struct platform_device *pdev)
 {
 	struct tegra186_cpufreq_data *data;
 	struct tegra_bpmp *bpmp;
-	unsigned int i = 0, err;
+	unsigned int i = 0, err, edvd_offset;
+	u32 edvd_val, cpu;
 
 	data = devm_kzalloc(&pdev->dev,
 			    struct_size(data, clusters, TEGRA186_NUM_CLUSTERS),
@@ -257,6 +258,14 @@ static int tegra186_cpufreq_probe(struct platform_device *pdev)
 			err = PTR_ERR(cluster->table);
 			goto put_bpmp;
 		}
+
+		for (cpu = 0; cpu < ARRAY_SIZE(tegra186_cpus); cpu++) {
+			if (data->cpus[cpu].bpmp_cluster_id == i) {
+				edvd_val = cluster->table[0].driver_data;
+				edvd_offset = data->cpus[cpu].edvd_offset;
+				writel(edvd_val, data->regs + edvd_offset);
+			}
+		}
 	}
 
 	tegra186_cpufreq_driver.driver_data = data;

-- 
2.50.1



  parent reply	other threads:[~2025-08-26 20:16 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-08-26 20:15 [PATCH 0/2] cpufreq: tegra186: Fix initialization and scaling Aaron Kling via B4 Relay
2025-08-26 20:15 ` [PATCH 1/2] cpufreq: tegra186: Set target frequency for all cpus in policy Aaron Kling via B4 Relay
2025-08-26 20:16 ` Aaron Kling via B4 Relay [this message]
2025-08-27  2:09   ` [PATCH 2/2] cpufreq: tegra186: Initialize all cores to base frequencies Mikko Perttunen
2025-08-27  5:54     ` Aaron Kling
2025-08-27 10:16       ` Mikko Perttunen

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