[PATCH 1/1] dt-bindings: arm: cpus: Allow fsl,soc-operating-points for i.MX6

[Frank Li <Frank.Li@nxp.com>]

The old i.MX6 (over 10 years) chip use fsl,soc-operating-points to get
SoC's voltage and frequency information when cpu change frequency.

Set fsl,soc-operating-points deprecated.

Allow soc-supply property and set it deprecated.

Fix bunch of CHECK_DTBS warnings:
  arch/arm/boot/dts/nxp/imx/imx6ul-prti6g.dtb: cpu@0 (arm,cortex-a7): Unevaluated properties are not allowed ('fsl,soc-operating-points', 'soc-supply' were unexpected)
	from schema $id: http://devicetree.org/schemas/arm/cpus.yaml#

Signed-off-by: Frank Li <Frank.Li@nxp.com>
---
 Documentation/devicetree/bindings/arm/cpus.yaml | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/Documentation/devicetree/bindings/arm/cpus.yaml b/Documentation/devicetree/bindings/arm/cpus.yaml
index 7d61de0c15ac3..867e2b4673d00 100644
--- a/Documentation/devicetree/bindings/arm/cpus.yaml
+++ b/Documentation/devicetree/bindings/arm/cpus.yaml
@@ -361,6 +361,19 @@ properties:
       A72 CPUs support Error Detection And Correction (EDAC) on their L1 and
       L2 caches. This flag marks this function as usable.

+  fsl,soc-operating-points:
+    $ref: /schemas/types.yaml#/definitions/uint32-matrix
+    description: FSL i.MX6 Soc operation-points when change cpu frequency
+    deprecated: true
+    items:
+      items:
+        - description: Frequency in kHz
+        - description: Voltage for OPP in uV
+
+  soc-supply:
+    description: Only for i.MX6/7 Soc.
+    deprecated: true
+
   qcom,saw:
     $ref: /schemas/types.yaml#/definitions/phandle
     description:
--
2.34.1