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From: Joel Fernandes <joelagnelf@nvidia.com>
To: linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org,
	dakr@kernel.org, acourbot@nvidia.com
Cc: Alistair Popple <apopple@nvidia.com>,
	Miguel Ojeda <ojeda@kernel.org>,
	Alex Gaynor <alex.gaynor@gmail.com>,
	Boqun Feng <boqun.feng@gmail.com>, Gary Guo <gary@garyguo.net>,
	bjorn3_gh@protonmail.com, Benno Lossin <lossin@kernel.org>,
	Andreas Hindborg <a.hindborg@kernel.org>,
	Alice Ryhl <aliceryhl@google.com>,
	Trevor Gross <tmgross@umich.edu>,
	David Airlie <airlied@gmail.com>, Simona Vetter <simona@ffwll.ch>,
	Maarten Lankhorst <maarten.lankhorst@linux.intel.com>,
	Maxime Ripard <mripard@kernel.org>,
	Thomas Zimmermann <tzimmermann@suse.de>,
	John Hubbard <jhubbard@nvidia.com>,
	Joel Fernandes <joelagnelf@nvidia.com>,
	Timur Tabi <ttabi@nvidia.com>,
	joel@joelfernandes.org, nouveau@lists.freedesktop.org,
	rust-for-linux@vger.kernel.org
Subject: [PATCH 08/17] nova-core: sequencer: Add register opcodes
Date: Fri, 29 Aug 2025 13:32:45 -0400	[thread overview]
Message-ID: <20250829173254.2068763-9-joelagnelf@nvidia.com> (raw)
In-Reply-To: <20250829173254.2068763-1-joelagnelf@nvidia.com>

These opcodes are used for regiter write, modify, poll and store (save).

Signed-off-by: Joel Fernandes <joelagnelf@nvidia.com>
---
 drivers/gpu/nova-core/gsp/sequencer.rs | 127 ++++++++++++++++++++++++-
 1 file changed, 123 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/nova-core/gsp/sequencer.rs b/drivers/gpu/nova-core/gsp/sequencer.rs
index 918c3405b33c..75672ae0a687 100644
--- a/drivers/gpu/nova-core/gsp/sequencer.rs
+++ b/drivers/gpu/nova-core/gsp/sequencer.rs
@@ -13,6 +13,7 @@
 use crate::firmware::Firmware;
 use crate::gsp::cmdq::{GspCmdq, GspMessageFromGsp};
 use crate::nvfw as fw;
+use crate::util::wait_on;
 
 use kernel::transmute::FromBytes;
 use kernel::{dev_dbg, dev_err};
@@ -32,7 +33,6 @@ pub(crate) struct GspSequencerInfo<'a> {
 
 /// GSP Sequencer Command types with payload data
 /// Commands have an opcode and a opcode-dependent struct.
-#[expect(dead_code)]
 pub(crate) enum GspSeqCmd {
     RegWrite(fw::GSP_SEQ_BUF_PAYLOAD_REG_WRITE),
     RegModify(fw::GSP_SEQ_BUF_PAYLOAD_REG_MODIFY),
@@ -44,6 +44,20 @@ impl GspSeqCmd {
     /// Creates a new GspSeqCmd from a firmware GSP_SEQUENCER_BUFFER_CMD
     pub(crate) fn from_fw_cmd(cmd: &fw::GSP_SEQUENCER_BUFFER_CMD) -> Result<Self> {
         match cmd.opCode {
+            // SAFETY: In the below unsafe accesses, we're using the union field
+            //         that corresponds to the opCode
+            fw::GSP_SEQ_BUF_OPCODE_GSP_SEQ_BUF_OPCODE_REG_WRITE => {
+                Ok(GspSeqCmd::RegWrite(unsafe { cmd.payload.regWrite }))
+            }
+            fw::GSP_SEQ_BUF_OPCODE_GSP_SEQ_BUF_OPCODE_REG_MODIFY => {
+                Ok(GspSeqCmd::RegModify(unsafe { cmd.payload.regModify }))
+            }
+            fw::GSP_SEQ_BUF_OPCODE_GSP_SEQ_BUF_OPCODE_REG_POLL => {
+                Ok(GspSeqCmd::RegPoll(unsafe { cmd.payload.regPoll }))
+            }
+            fw::GSP_SEQ_BUF_OPCODE_GSP_SEQ_BUF_OPCODE_REG_STORE => {
+                Ok(GspSeqCmd::RegStore(unsafe { cmd.payload.regStore }))
+            }
             _ => Err(EINVAL),
         }
     }
@@ -63,7 +77,16 @@ pub(crate) fn new(data: &[u8], dev: &device::Device<device::Bound>) -> Result<Se
     /// Get the size of this command in bytes, the command consists of
     /// a 4-byte opcode, and a variable-sized payload.
     pub(crate) fn size_bytes(&self) -> usize {
-        0
+        let opcode_size = size_of::<fw::GSP_SEQ_BUF_OPCODE>();
+        match self {
+            // For commands with payloads, add the payload size in bytes
+            GspSeqCmd::RegWrite(_) => opcode_size + size_of::<fw::GSP_SEQ_BUF_PAYLOAD_REG_WRITE>(),
+            GspSeqCmd::RegModify(_) => {
+                opcode_size + size_of::<fw::GSP_SEQ_BUF_PAYLOAD_REG_MODIFY>()
+            }
+            GspSeqCmd::RegPoll(_) => opcode_size + size_of::<fw::GSP_SEQ_BUF_PAYLOAD_REG_POLL>(),
+            GspSeqCmd::RegStore(_) => opcode_size + size_of::<fw::GSP_SEQ_BUF_PAYLOAD_REG_STORE>(),
+        }
     }
 }
 
@@ -82,12 +105,108 @@ pub(crate) trait GspSeqCmdRunner {
     fn run(&self, sequencer: &GspSequencer<'_>) -> Result;
 }
 
-impl GspSeqCmdRunner for GspSeqCmd {
-    fn run(&self, _seq: &GspSequencer<'_>) -> Result {
+impl GspSeqCmdRunner for fw::GSP_SEQ_BUF_PAYLOAD_REG_WRITE {
+    fn run(&self, sequencer: &GspSequencer<'_>) -> Result {
+        dev_dbg!(
+            sequencer.dev,
+            "RegWrite: addr=0x{:x}, val=0x{:x}\n",
+            self.addr,
+            self.val
+        );
+        let addr = self.addr as usize;
+        let val = self.val;
+        let _ = sequencer.bar.try_write32(val, addr);
+        Ok(())
+    }
+}
+
+impl GspSeqCmdRunner for fw::GSP_SEQ_BUF_PAYLOAD_REG_MODIFY {
+    fn run(&self, sequencer: &GspSequencer<'_>) -> Result {
+        dev_dbg!(
+            sequencer.dev,
+            "RegModify: addr=0x{:x}, mask=0x{:x}, val=0x{:x}\n",
+            self.addr,
+            self.mask,
+            self.val
+        );
+
+        let addr = self.addr as usize;
+        if let Ok(temp) = sequencer.bar.try_read32(addr) {
+            let _ = sequencer
+                .bar
+                .try_write32((temp & !self.mask) | self.val, addr);
+        }
         Ok(())
     }
 }
 
+impl GspSeqCmdRunner for fw::GSP_SEQ_BUF_PAYLOAD_REG_POLL {
+    fn run(&self, sequencer: &GspSequencer<'_>) -> Result {
+        dev_dbg!(
+            sequencer.dev,
+            "RegPoll: addr=0x{:x}, mask=0x{:x}, val=0x{:x}, timeout=0x{:x}, error=0x{:x}\n",
+            self.addr,
+            self.mask,
+            self.val,
+            self.timeout,
+            self.error
+        );
+
+        let addr = self.addr as usize;
+        let mut timeout_us = self.timeout as i64;
+
+        // Default timeout to 4 seconds
+        timeout_us = if timeout_us == 0 { 4000000 } else { timeout_us };
+
+        // First read
+        sequencer.bar.try_read32(addr)?;
+
+        // Poll the requested register with requested timeout.
+        // wait_on() unwraps the closure's Option<R> return value
+        // and returns a Result<R>.
+        wait_on(Delta::from_micros(timeout_us), || {
+            sequencer.bar.try_read32(addr).ok().and_then(|current| {
+                if (current & self.mask) == self.val {
+                    Some(())
+                } else {
+                    None
+                }
+            })
+        })?;
+        Ok(())
+    }
+}
+
+impl GspSeqCmdRunner for fw::GSP_SEQ_BUF_PAYLOAD_REG_STORE {
+    fn run(&self, sequencer: &GspSequencer<'_>) -> Result {
+        let addr = self.addr as usize;
+        let _index = self.index;
+
+        let val = sequencer.bar.try_read32(addr)?;
+
+        dev_dbg!(
+            sequencer.dev,
+            "RegStore: addr=0x{:x}, index=0x{:x}, value={:?}\n",
+            self.addr,
+            self.index,
+            val
+        );
+
+        Ok(())
+    }
+}
+
+impl GspSeqCmdRunner for GspSeqCmd {
+    fn run(&self, seq: &GspSequencer<'_>) -> Result {
+        match self {
+            GspSeqCmd::RegWrite(cmd) => cmd.run(seq),
+            GspSeqCmd::RegModify(cmd) => cmd.run(seq),
+            GspSeqCmd::RegPoll(cmd) => cmd.run(seq),
+            GspSeqCmd::RegStore(cmd) => cmd.run(seq),
+        }
+    }
+}
+
 pub(crate) struct GspSeqIter<'a> {
     cmd_data: &'a [u8],
     current_offset: usize, // Tracking the current position
-- 
2.34.1


  parent reply	other threads:[~2025-08-29 17:33 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-08-29 17:32 [PATCH 00/17] nova-core: Complete GSP boot and begin RPC communication Joel Fernandes
2025-08-29 17:32 ` [PATCH 01/17] nova-core: falcon: Move waiting until halted to a helper Joel Fernandes
2025-08-29 17:32 ` [PATCH 02/17] nova-core: falcon: Move start functionality into separate helper Joel Fernandes
2025-08-29 17:32 ` [PATCH 03/17] nova-core: falcon: Move mbox functionalities into helper Joel Fernandes
2025-08-29 17:32 ` [PATCH 04/17] nova-core: falcon: Move dma_reset functionality " Joel Fernandes
2025-08-29 17:32 ` [PATCH 05/17] nova-core: gsp: Add support for checking if GSP reloaded Joel Fernandes
2025-08-29 18:44   ` Timur Tabi
2025-08-29 22:43     ` Joel Fernandes
2025-08-29 17:32 ` [PATCH 06/17] nova-core: Add bindings required by GSP sequencer Joel Fernandes
2025-08-29 17:32 ` [PATCH 07/17] nova-core: Implement the " Joel Fernandes
2025-08-29 17:32 ` Joel Fernandes [this message]
2025-08-29 17:32 ` [PATCH 09/17] nova-core: sequencer: Add delay opcode support Joel Fernandes
2025-08-29 17:32 ` [PATCH 10/17] nova-core: sequencer: Implement basic core operations Joel Fernandes
2025-08-29 17:32 ` [PATCH 11/17] nova-core: sequencer: Implement core resume operation Joel Fernandes
2025-08-29 17:32 ` [PATCH 12/17] nova-core: clear MBOX0 before waiting for scrubber completion Joel Fernandes
2025-08-29 17:32 ` [PATCH 13/17] nova-core: Ada: basic GPU identification Joel Fernandes
2025-08-29 17:32 ` [PATCH 14/17] nova-core: remove an unnecessary register read: HWCFG1 Joel Fernandes
2025-08-29 17:32 ` [PATCH 15/17] nova-core: remove unnecessary need_riscv, bar parameters Joel Fernandes
2025-08-29 17:32 ` [PATCH 16/17] gpu: nova-core: gsp: Wait for gsp initialisation to complete Joel Fernandes
2025-08-29 17:32 ` [PATCH 17/17] gpu: nova-core: Add get_gsp_info() command Joel Fernandes

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