From: hans.zhang@cixtech.com
To: bhelgaas@google.com, lpieralisi@kernel.org, kw@linux.com,
mani@kernel.org, robh@kernel.org, kwilczynski@kernel.org,
krzk+dt@kernel.org, conor+dt@kernel.org
Cc: mpillai@cadence.com, fugang.duan@cixtech.com,
guoyin.chen@cixtech.com, peter.chen@cixtech.com,
cix-kernel-upstream@cixtech.com, linux-pci@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
Hans Zhang <hans.zhang@cixtech.com>
Subject: [PATCH v9 10/14] PCI: Add Cix Technology Vendor and Device ID
Date: Mon, 1 Sep 2025 17:20:48 +0800 [thread overview]
Message-ID: <20250901092052.4051018-11-hans.zhang@cixtech.com> (raw)
In-Reply-To: <20250901092052.4051018-1-hans.zhang@cixtech.com>
From: Hans Zhang <hans.zhang@cixtech.com>
Add CIX P1 (internal name sky1) as a vendor and device ID for PCI
devices. This ID will be used by the CIX Sky1 PCIe host controller driver.
Signed-off-by: Hans Zhang <hans.zhang@cixtech.com>
Acked-by: Manivannan Sadhasivam <mani@kernel.org>
---
include/linux/pci_ids.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
index 92ffc4373f6d..24b04d085920 100644
--- a/include/linux/pci_ids.h
+++ b/include/linux/pci_ids.h
@@ -2631,6 +2631,9 @@
#define PCI_VENDOR_ID_CXL 0x1e98
+#define PCI_VENDOR_ID_CIX 0x1f6c
+#define PCI_DEVICE_ID_CIX_SKY1 0x0001
+
#define PCI_VENDOR_ID_TEHUTI 0x1fc9
#define PCI_DEVICE_ID_TEHUTI_3009 0x3009
#define PCI_DEVICE_ID_TEHUTI_3010 0x3010
--
2.49.0
next prev parent reply other threads:[~2025-09-01 9:21 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-09-01 9:20 [PATCH v9 00/14] Enhance the PCIe controller driver for next generation controllers hans.zhang
2025-09-01 9:20 ` [PATCH v9 01/14] PCI: cadence: Add module support for platform controller driver hans.zhang
2025-09-01 9:20 ` [PATCH v9 02/14] PCI: cadence: Split PCIe controller header file hans.zhang
2025-09-01 9:20 ` [PATCH v9 03/14] PCI: cadence: Add register definitions for High Perf Architecture (HPA) hans.zhang
2025-09-08 10:22 ` Manivannan Sadhasivam
2025-09-08 11:02 ` Manikandan Karunakaran Pillai
2025-09-15 3:43 ` Manikandan Karunakaran Pillai
2025-09-15 5:32 ` Manivannan Sadhasivam
2025-09-01 9:20 ` [PATCH v9 04/14] PCI: cadence: Add helper functions for supporting " hans.zhang
2025-09-08 10:23 ` Manivannan Sadhasivam
2025-09-08 11:03 ` Manikandan Karunakaran Pillai
2025-09-01 9:20 ` [PATCH v9 05/14] PCI: cadence: Move PCIe EP common functions to a separate file hans.zhang
2025-09-08 10:24 ` Manivannan Sadhasivam
2025-09-01 9:20 ` [PATCH v9 06/14] PCI: cadence: Move PCIe RP " hans.zhang
2025-09-01 9:20 ` [PATCH v9 07/14] PCI: cadence: Add support for High Perf Architecture (HPA) controller hans.zhang
2025-09-08 11:28 ` Manivannan Sadhasivam
2025-09-08 16:41 ` Hans Zhang
2025-09-15 5:49 ` Manivannan Sadhasivam
2025-09-01 9:20 ` [PATCH v9 08/14] PCI: cadence: Update PCIe platform to use register offsets passed hans.zhang
2025-09-01 9:20 ` [PATCH v9 09/14] dt-bindings: PCI: Add CIX Sky1 PCIe Root Complex bindings hans.zhang
2025-09-01 9:20 ` hans.zhang [this message]
2025-09-01 9:20 ` [PATCH v9 11/14] PCI: sky1: Add PCIe host support for CIX Sky1 hans.zhang
2025-09-01 9:20 ` [PATCH v9 12/14] MAINTAINERS: add entry for CIX Sky1 PCIe driver hans.zhang
2025-09-01 9:20 ` [PATCH v9 13/14] arm64: dts: cix: Add PCIe Root Complex on sky1 hans.zhang
2025-09-01 9:20 ` [PATCH v9 14/14] arm64: dts: cix: Enable PCIe on the Orion O6 board hans.zhang
2025-10-19 5:50 ` [PATCH v9 00/14] Enhance the PCIe controller driver for next generation controllers Manivannan Sadhasivam
2025-10-19 6:29 ` Manikandan Karunakaran Pillai
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