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[2001:14ba:a0c3:3a00:264b:feff:fe8b:be8a]) by smtp.gmail.com with ESMTPSA id 38308e7fff4ca-337f50d30b0sm9891421fa.67.2025.09.03.04.58.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 03 Sep 2025 04:58:19 -0700 (PDT) From: Dmitry Baryshkov Subject: [PATCH v8 0/9] dt-bindings: msm/dp: Add support for 4 pixel streams Date: Wed, 03 Sep 2025 14:58:11 +0300 Message-Id: <20250903-dp_mst_bindings-v8-0-7526f0311eaa@oss.qualcomm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit X-B4-Tracking: v=1; b=H4sIAFMtuGgC/4XSX2vCMBAA8K8ieV5dcvlbn/weY0jSXlxgbbWpx SF+912VoVDL8hC4cPldwt2FZewTZrZZXViPY8qpaylwbytWffl2j0WqKWbAQQnaivqwa/KwC6m tU7vPhdXSxFiVHiEyunXoMabzTfz4pPgr5aHrf24FRjGdLlujKHhR+tIrGbgB5bfHU6pSW62rr mGTNsKfoLmWfC4ACbEErYyqJXi37XJeH0/+m4TmwcgHY4WdM5IYCxVyB05bLhcY9WAcL+eMIiY EKQwaSZJaYPQ/jJ4Y4XREbVWUS58yT4zQc8YQg1boQEtLZxYY+8TAi9dYYiCAcdSmUtjwgrneB 6FH6l9Ow30aWPAZiykpDZtVi+fhvfF5wJ7yr79PVi4liQIAAA== X-Change-ID: 20241202-dp_mst_bindings-7536ffc9ae2f To: Rob Clark , Dmitry Baryshkov , Abhinav Kumar , Jessica Zhang , Sean Paul , Marijn Suijten , David Airlie , Simona Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Kuogee Hsieh , Abel Vesa , Mahadevan , Bjorn Andersson , Konrad Dybcio Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Krzysztof Kozlowski , Abhinav Kumar , Krzysztof Kozlowski X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=4867; i=dmitry.baryshkov@oss.qualcomm.com; h=from:subject:message-id; bh=ez3W78p0zTtxf088i7D4pbQ8b7ByUAjKoGhUjg8v0yM=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBouC1WOlaFmFjIYTeG9HX6eI/ke20dxqwsfOOjm JJvTI6zj+KJATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCaLgtVgAKCRCLPIo+Aiko 1e2RB/9l1GEJPABtTw7pbT4uzyjnWDx1YYY041Z0VdTx1lD+5xczNcAZrkygMlSwHeB4+sgPW0T Ej9Uev9JVkm7ynQSjSfwJwxPsJ9slhA9GI74CpXCZ7qtFprObVkMqJ5B4tUeUJCUKoVUJ+KJtMo idp1N4dDfEqk/KxJL7pz8az5x3qDW/xG2CbpphsiTSyVxX3yxPiMVmtDHxgfBDmr7uCO7TVEKYu kRd59fForDoiaFJ8MSCtGhIqtTY2jtzmV45Nl2GANpC8BJNx3gOaoFpDwVnzmMFJf24rt8D/spV OVL7AkwwuOjhp2RmUZPFv6QN6YrCp02TCIb1tVaShURjtBxv X-Developer-Key: i=dmitry.baryshkov@oss.qualcomm.com; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A X-Proofpoint-GUID: DjVVn3Q7PiAaHykgf5ouD-METGK-X1Z0 X-Authority-Analysis: v=2.4 cv=Jt/xrN4C c=1 sm=1 tr=0 ts=68b82d5d cx=c_pps a=7E5Bxpl4vBhpaufnMqZlrw==:117 a=xqWC_Br6kY4A:10 a=IkcTkHD0fZMA:10 a=yJojWOMRYYMA:10 a=VwQbUJbxAAAA:8 a=EUspDBNiAAAA:8 a=COk6AnOGAAAA:8 a=rtwBFDCfVmBUUsGphOkA:9 a=QEXdDO2ut3YA:10 a=pJ04lnu7RYOZP9TFuWaZ:22 a=TjNXssC_j7lpFel5tvFf:22 X-Proofpoint-ORIG-GUID: DjVVn3Q7PiAaHykgf5ouD-METGK-X1Z0 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwODMwMDAwMSBTYWx0ZWRfXyNg4Azd5qWNT 0Gs+aNF6rEkToji5WII4/O6nZwL8CWtL4xo4znGrQady8ZjZxTgCqi42ifq9pLt6VMu8oQRaoFi k08zl/2W87T6/l/c5JZpHgPxSY5lTCfn2YVXnFCsDu+59w0M1q/4zUTdaAu4HXmBFM0HsoB2Abs 9JreEWyLDNuhm12mx53iDlhQDOPYeu2dQ0SaNqv6zjPLGf3jULJaWSMNIH5MmT7Acu6VVNLP1hb 7fmYFRJmO8E8DEMf6V3N8/v72cgLNeHDAg7yDkthoQUxFpUQD+byU0dBLVJII2EUWN6K0iSTRk+ 6QLzVtGUU9gq9ZyR9F0CTvDPgT651+gvxvwtYx/Evlk11gEfWuVGdzyntO1ZpR0EBuUOAOVSQKX cXyLKbCq X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1117,Hydra:6.1.9,FMLib:17.12.80.40 definitions=2025-09-03_06,2025-08-28_01,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 adultscore=0 priorityscore=1501 clxscore=1015 bulkscore=0 impostorscore=0 spamscore=0 phishscore=0 suspectscore=0 malwarescore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2507300000 definitions=main-2508300001 On some MSM chipsets, the display port controller is capable of supporting up to 4 streams. To drive these additional streams, the pixel clocks for the corresponding stream needs to be enabled. Fixup the documentation of some of the bindings to clarify exactly which stream they correspond to, then add the new bindings and device tree changes. --- Changes in v8: - Expanded commit messages in order to describe that SM6350-related change is not going to break platform support (Krzysztof). - Also added restrictions to clock-names properties (Krzysztof). - Link to v7: https://lore.kernel.org/r/20250829-dp_mst_bindings-v7-0-2b268a43917b@oss.qualcomm.com Changes in v7: - Changed fallback compatible for SM6350, it doesn't have MST - Reworked MST schema in order to remove nested ifs (Krzysztof) - Didn't pick up Rob's R-B tag since the patch was heavily reworked - Added P2 / P3 / MST2LINK / MST3LINK regions - Link to v6: https://lore.kernel.org/r/20250815-dp_mst_bindings-v6-0-e715bbbb5386@oss.qualcomm.com Changes in v6: - Switched platforms with different MST configrations to use single properties entry instead of using oneOf (Rob) - Link to v5: https://lore.kernel.org/r/20250809-dp_mst_bindings-v5-0-b185fe574f38@oss.qualcomm.com Changes in v5: - Removed SC7280-related comments, it has no DP MST support - Link to v4: https://lore.kernel.org/r/20250809-dp_mst_bindings-v4-0-bb316e638284@oss.qualcomm.com Changes in v4: - Picked up series from Jessica by the mutual agreement - Corrected Rob's tags (Krzysztof) - Split X1E80100 DP patch (Dmitry) - Removed SC7280 changes - Enabled the MST clock on SDM845 - Link to v3: https://lore.kernel.org/r/20250717-dp_mst_bindings-v3-0-72ce08285703@oss.qualcomm.com Changes in v3: - Fixed dtschema errors (Rob Herring) - Documented all pixel stream clocks (Dmitry) - Ordered compatibility list alphabetically (Dmitry) - Dropped assigned-clocks too (Dmitry) - Link to v2: https://lore.kernel.org/r/20250530-dp_mst_bindings-v2-0-f925464d32a8@oss.qualcomm.com Changes in v2: - Rebased on top of next-20250523 - Dropped merged maintainer patch - Added a patch to make the corresponding dts change to add pixel 1 stream - Squashed pixel 0 and pixel 1 stream binding patches (Krzysztof) - Drop assigned-clock-parents bindings for dp-controller (Krzysztof) - Updated dp-controller.yaml to include all chipsets that support stream 1 pixel clock (Krzysztof) - Added missing minItems and if statement (Krzysztof) - Link to v1: https://lore.kernel.org/r/20241202-dp_mst_bindings-v1-0-9a9a43b0624a@quicinc.com --- Abhinav Kumar (4): dt-bindings: display/msm: qcom,x1e80100-mdss: correct DP addresses dt-bindings: display/msm: dp-controller: add X1E80100 dt-bindings: display/msm: drop assigned-clock-parents for dp controller dt-bindings: display/msm: expand to support MST Dmitry Baryshkov (4): dt-bindings: display/msm: dp-controller: allow eDP for SA8775P dt-bindings: display/msm: dp-controller: fix fallback for SM6350 dt-bindings: display/msm: dp-controller: document DP on SM7150 arm64: dts: qcom: sm6350: correct DP compatibility strings Jessica Zhang (1): arm64: dts: qcom: Add MST pixel streams for displayport .../bindings/display/msm/dp-controller.yaml | 146 ++++++++++++++++++--- .../bindings/display/msm/qcom,sa8775p-mdss.yaml | 26 +++- .../bindings/display/msm/qcom,sar2130p-mdss.yaml | 10 +- .../bindings/display/msm/qcom,sc7280-mdss.yaml | 3 +- .../bindings/display/msm/qcom,sm7150-mdss.yaml | 16 ++- .../bindings/display/msm/qcom,sm8750-mdss.yaml | 10 +- .../bindings/display/msm/qcom,x1e80100-mdss.yaml | 20 +-- arch/arm64/boot/dts/qcom/lemans.dtsi | 46 +++++-- arch/arm64/boot/dts/qcom/sar2130p.dtsi | 10 +- arch/arm64/boot/dts/qcom/sc7280.dtsi | 3 +- arch/arm64/boot/dts/qcom/sc8180x.dtsi | 23 +++- arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 72 ++++++---- arch/arm64/boot/dts/qcom/sdm845.dtsi | 15 ++- arch/arm64/boot/dts/qcom/sm6350.dtsi | 2 +- arch/arm64/boot/dts/qcom/sm8150.dtsi | 10 +- arch/arm64/boot/dts/qcom/sm8250.dtsi | 10 +- arch/arm64/boot/dts/qcom/sm8350.dtsi | 10 +- arch/arm64/boot/dts/qcom/sm8450.dtsi | 10 +- arch/arm64/boot/dts/qcom/sm8550.dtsi | 10 +- arch/arm64/boot/dts/qcom/sm8650.dtsi | 10 +- arch/arm64/boot/dts/qcom/x1e80100.dtsi | 30 +++-- 21 files changed, 376 insertions(+), 116 deletions(-) --- base-commit: 8cd53fb40a304576fa86ba985f3045d5c55b0ae3 change-id: 20241202-dp_mst_bindings-7536ffc9ae2f Best regards, -- With best wishes Dmitry