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From: Ian Rogers <irogers@google.com>
To: Peter Zijlstra <peterz@infradead.org>,
	Ingo Molnar <mingo@redhat.com>,
	 Arnaldo Carvalho de Melo <acme@kernel.org>,
	Namhyung Kim <namhyung@kernel.org>,
	 Mark Rutland <mark.rutland@arm.com>,
	 Alexander Shishkin <alexander.shishkin@linux.intel.com>,
	Jiri Olsa <jolsa@kernel.org>,  Ian Rogers <irogers@google.com>,
	Adrian Hunter <adrian.hunter@intel.com>,
	 Kan Liang <kan.liang@linux.intel.com>,
	James Clark <james.clark@linaro.org>,
	 Xu Yang <xu.yang_2@nxp.com>,
	linux-kernel@vger.kernel.org,  linux-perf-users@vger.kernel.org,
	John Garry <john.g.garry@oracle.com>,
	 Jing Zhang <renyu.zj@linux.alibaba.com>,
	Sandipan Das <sandipan.das@amd.com>,
	 Benjamin Gray <bgray@linux.ibm.com>,
	Perry Taylor <perry.taylor@intel.com>,
	 Samantha Alt <samantha.alt@intel.com>,
	Caleb Biggers <caleb.biggers@intel.com>,
	 Weilin Wang <weilin.wang@intel.com>,
	Edward Baker <edward.baker@intel.com>,
	 Thomas Falcon <thomas.falcon@intel.com>
Subject: [PATCH v6 14/22] perf jevents: Add FPU metrics for Intel
Date: Wed,  3 Sep 2025 21:46:45 -0700	[thread overview]
Message-ID: <20250904044653.1002362-15-irogers@google.com> (raw)
In-Reply-To: <20250904044653.1002362-1-irogers@google.com>

Metrics break down of floating point operations.

Signed-off-by: Ian Rogers <irogers@google.com>
---
 tools/perf/pmu-events/intel_metrics.py | 90 ++++++++++++++++++++++++++
 1 file changed, 90 insertions(+)

diff --git a/tools/perf/pmu-events/intel_metrics.py b/tools/perf/pmu-events/intel_metrics.py
index 4f8dc054ad98..ff571256e100 100755
--- a/tools/perf/pmu-events/intel_metrics.py
+++ b/tools/perf/pmu-events/intel_metrics.py
@@ -316,6 +316,95 @@ def IntelCtxSw() -> MetricGroup:
                                     "retired & core cycles between context switches"))
 
 
+def IntelFpu() -> Optional[MetricGroup]:
+  cyc = Event("cycles")
+  try:
+    s_64 = Event("FP_ARITH_INST_RETIRED.SCALAR_SINGLE",
+                 "SIMD_INST_RETIRED.SCALAR_SINGLE")
+  except:
+    return None
+  d_64 = Event("FP_ARITH_INST_RETIRED.SCALAR_DOUBLE",
+               "SIMD_INST_RETIRED.SCALAR_DOUBLE")
+  s_128 = Event("FP_ARITH_INST_RETIRED.128B_PACKED_SINGLE",
+                "SIMD_INST_RETIRED.PACKED_SINGLE")
+
+  flop = s_64 + d_64 + 4 * s_128
+
+  d_128 = None
+  s_256 = None
+  d_256 = None
+  s_512 = None
+  d_512 = None
+  try:
+    d_128 = Event("FP_ARITH_INST_RETIRED.128B_PACKED_DOUBLE")
+    flop += 2 * d_128
+    s_256 = Event("FP_ARITH_INST_RETIRED.256B_PACKED_SINGLE")
+    flop += 8 * s_256
+    d_256 = Event("FP_ARITH_INST_RETIRED.256B_PACKED_DOUBLE")
+    flop += 4 * d_256
+    s_512 = Event("FP_ARITH_INST_RETIRED.512B_PACKED_SINGLE")
+    flop += 16 * s_512
+    d_512 = Event("FP_ARITH_INST_RETIRED.512B_PACKED_DOUBLE")
+    flop += 8 * d_512
+  except:
+    pass
+
+  f_assist = Event("ASSISTS.FP", "FP_ASSIST.ANY", "FP_ASSIST.S")
+  if f_assist in [
+      "ASSISTS.FP",
+      "FP_ASSIST.S",
+  ]:
+    f_assist += "/cmask=1/"
+
+  flop_r = d_ratio(flop, interval_sec)
+  flop_c = d_ratio(flop, cyc)
+  nmi_constraint = MetricConstraint.GROUPED_EVENTS
+  if f_assist.name == "ASSISTS.FP": # Icelake+
+    nmi_constraint = MetricConstraint.NO_GROUP_EVENTS_NMI
+  def FpuMetrics(group: str, fl: Optional[Event], mult: int, desc: str) -> Optional[MetricGroup]:
+    if not fl:
+      return None
+
+    f = fl * mult
+    fl_r = d_ratio(f, interval_sec)
+    r_s = d_ratio(fl, interval_sec)
+    return MetricGroup(group, [
+        Metric(f"{group}_of_total", desc + " floating point operations per second",
+               d_ratio(f, flop), "100%"),
+        Metric(f"{group}_flops", desc + " floating point operations per second",
+               fl_r, "flops/s"),
+        Metric(f"{group}_ops", desc + " operations per second",
+               r_s, "ops/s"),
+    ])
+
+  return MetricGroup("lpm_fpu", [
+      MetricGroup("lpm_fpu_total", [
+          Metric("lpm_fpu_total_flops", "Floating point operations per second",
+                 flop_r, "flops/s"),
+          Metric("lpm_fpu_total_flopc", "Floating point operations per cycle",
+                 flop_c, "flops/cycle", constraint=nmi_constraint),
+      ]),
+      MetricGroup("lpm_fpu_64", [
+          FpuMetrics("lpm_fpu_64_single", s_64, 1, "64-bit single"),
+          FpuMetrics("lpm_fpu_64_double", d_64, 1, "64-bit double"),
+      ]),
+      MetricGroup("lpm_fpu_128", [
+          FpuMetrics("lpm_fpu_128_single", s_128, 4, "128-bit packed single"),
+          FpuMetrics("lpm_fpu_128_double", d_128, 2, "128-bit packed double"),
+      ]),
+      MetricGroup("lpm_fpu_256", [
+          FpuMetrics("lpm_fpu_256_single", s_256, 8, "128-bit packed single"),
+          FpuMetrics("lpm_fpu_256_double", d_256, 4, "128-bit packed double"),
+      ]),
+      MetricGroup("lpm_fpu_512", [
+          FpuMetrics("lpm_fpu_512_single", s_512, 16, "128-bit packed single"),
+          FpuMetrics("lpm_fpu_512_double", d_512, 8, "128-bit packed double"),
+      ]),
+      Metric("lpm_fpu_assists", "FP assists as a percentage of cycles",
+             d_ratio(f_assist, cyc), "100%"),
+  ])
+
+
 def IntelIlp() -> MetricGroup:
   tsc = Event("msr/tsc/")
   c0 = Event("msr/mperf/")
@@ -726,6 +815,7 @@ def main() -> None:
       Tsx(),
       IntelBr(),
       IntelCtxSw(),
+      IntelFpu(),
       IntelIlp(),
       IntelL2(),
       IntelLdSt(),
-- 
2.51.0.338.gd7d06c2dae-goog


  parent reply	other threads:[~2025-09-04  4:47 UTC|newest]

Thread overview: 27+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-09-04  4:46 [PATCH v6 00/22] Python generated Intel metrics Ian Rogers
2025-09-04  4:46 ` [PATCH v6 01/22] perf jevents: Add RAPL metrics for all Intel models Ian Rogers
2025-09-04  4:46 ` [PATCH v6 02/22] perf jevents: Add idle metric for " Ian Rogers
2025-09-04  4:46 ` [PATCH v6 03/22] perf jevents: Add CheckPmu to see if a PMU is in loaded json events Ian Rogers
2025-09-04  4:46 ` [PATCH v6 04/22] perf jevents: Add smi metric group for Intel models Ian Rogers
2025-09-04  4:46 ` [PATCH v6 05/22] perf jevents: Mark metrics with experimental events as experimental Ian Rogers
2025-09-17 18:02   ` Falcon, Thomas
2025-09-17 20:49     ` Ian Rogers
2025-09-04  4:46 ` [PATCH v6 06/22] perf jevents: Add tsx metric group for Intel models Ian Rogers
2025-09-04  4:46 ` [PATCH v6 07/22] perf jevents: Add br metric group for branch statistics on Intel Ian Rogers
2025-09-04  4:46 ` [PATCH v6 08/22] perf jevents: Add software prefetch (swpf) metric group for Intel Ian Rogers
2025-09-04  4:46 ` [PATCH v6 09/22] perf jevents: Add ports metric group giving utilization on Intel Ian Rogers
2025-09-04  4:46 ` [PATCH v6 10/22] perf jevents: Add L2 metrics for Intel Ian Rogers
2025-09-04  4:46 ` [PATCH v6 11/22] perf jevents: Add load store breakdown metrics ldst " Ian Rogers
2025-09-04  4:46 ` [PATCH v6 12/22] perf jevents: Add ILP metrics " Ian Rogers
2025-09-04  4:46 ` [PATCH v6 13/22] perf jevents: Add context switch " Ian Rogers
2025-09-04  4:46 ` Ian Rogers [this message]
2025-09-04  4:46 ` [PATCH v6 15/22] perf jevents: Add Miss Level Parallelism (MLP) metric " Ian Rogers
2025-09-04  4:46 ` [PATCH v6 16/22] perf jevents: Add mem_bw " Ian Rogers
2025-09-04  4:46 ` [PATCH v6 17/22] perf jevents: Add local/remote "mem" breakdown metrics " Ian Rogers
2025-09-04  4:46 ` [PATCH v6 18/22] perf jevents: Add dir " Ian Rogers
2025-09-04  4:46 ` [PATCH v6 19/22] perf jevents: Add C-State metrics from the PCU PMU " Ian Rogers
2025-09-04  4:46 ` [PATCH v6 20/22] perf jevents: Add local/remote miss latency metrics " Ian Rogers
2025-09-04  4:46 ` [PATCH v6 21/22] perf jevents: Add upi_bw metric " Ian Rogers
2025-09-04  4:46 ` [PATCH v6 22/22] perf jevents: Add mesh bandwidth saturation " Ian Rogers
2025-09-19 15:31 ` [PATCH v6 00/22] Python generated Intel metrics Falcon, Thomas
2025-09-20 12:54   ` Ian Rogers

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