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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?iso-8859-1?Q?KqSjR9ELLHoBq/D095Km389GtaBhGJm45Gvp/jquj4P1OyAJm806xvzdRu?= =?iso-8859-1?Q?jZzjvYQc303LnR1MzZICHbRSL0LuGpsfflqxkmPZkr9Xohy99Ll8xl0NKi?= =?iso-8859-1?Q?Pvtnugib1doqdM1cZAmJwa7+QV35ko6pGZ7aNzD9vmsDSXfaCIT98RY47F?= =?iso-8859-1?Q?WAG1R2LjikdnRCVPGvYbKHfGCRff75L3YgdHNy/Oejzk2vyA5M31Nw60nn?= =?iso-8859-1?Q?GXQWRPxsnVeJfgzWWjp5WNYD6bfrtnIhoLpzoV4wexpeJ0Zbyy6Gey8K7r?= =?iso-8859-1?Q?eZVFZiL0JJ8o1vj+qMr3re2WirLOOXmObs4+rTq96UAJS81/pqJA0+hat5?= =?iso-8859-1?Q?h50thtxEvUrXKEz39FpXxOLzOWNaZ8ovAzSRdSSej3w/jwiaGHIjFLkuwN?= =?iso-8859-1?Q?P7lfKyE3bsz/CF+XoNnmL61wHCBuflKsE1NrRdVN4RLaWmWw07zrNAyDRz?= =?iso-8859-1?Q?v88pMQS8k2MxyvgpbxmihEaHhYFWn4jX8muovK1oLQa8p9RTJFYakdMHlX?= =?iso-8859-1?Q?yRoUn3WShUQK1mfxKFdylrdaUn8b9D4ZKbkfVUuXRORGamUaIGhuuiQhOS?= =?iso-8859-1?Q?pnxRz4Q39PP1szuSrS5hvTIQmSgl6BkquDS8S5WBIEf2Hl5osHXOHagTNM?= =?iso-8859-1?Q?Wv8MiW36j4J0OEZV0unEaN6Qb+Job/BnlvHdBwam9N8r6dmfnX8D9HSSdf?= =?iso-8859-1?Q?WVTZGRt2wfbwR0Gmpr6YYPA3zYoUnrSMXyW/TJHb7lCJhLiVmvdFzPKQoi?= =?iso-8859-1?Q?1mhpyUNcAV+iy+X2HEeXMpmyrC9Bd1IH1BvypP68ZNvspjzsAFk9k+lON+?= =?iso-8859-1?Q?aQbL9vLnjOEDo8gqMvMJ9RXNEqqE5+WmMKRWZ2fmUpFBYNJ3y/LiCXg4cv?= =?iso-8859-1?Q?obQBW6i3UQhZ883Gp3+ROD9HTIBChkPg9xRi8bsB4x6xfpTlPa3DkvQs8y?= =?iso-8859-1?Q?iWmHDewzO7a7d7JbnKj6bqf4iHLO/XxjNGE29EghjRtaWZFrHACWpO3p2W?= =?iso-8859-1?Q?iL2QTEN8r38pffdQzV9SR+AegAt/5dcaNjbvYNOV8QmlGP7sqvup01W5iL?= =?iso-8859-1?Q?iEvs+C06QVp2Id2q6yAI45xrCUxLw/BlctSE7h/Vc9HI9+PFU9nMGymPMa?= =?iso-8859-1?Q?oB1AXlQZVc5oOGMl2OMrviWVHbjrV9ODhNlEsN6+pq6oPbq87D1hIS9ScO?= =?iso-8859-1?Q?Vr4F0J3nBxgALOg1Eym4YcHQmWe6HjvA1Of0C8hoFh1EGNLa6CnNYBTF0b?= =?iso-8859-1?Q?At1dCQXMacm4mYQTgzAGsj3k2hmJ+pU2Rmp40Y2F+4sF7YYRAf+QayVWGD?= =?iso-8859-1?Q?biJjrReViCkA73YtGAt8VEYg4SbiBvF4ocLmj1uBJicUSgFPJxOadAgssv?= =?iso-8859-1?Q?SQV/chDF60ZLkEv3iOT4iGmp0EpXDnp+QUBtepqlqsgPNz+3w1S4h8u1kT?= =?iso-8859-1?Q?ckKXm8yboPDopfBJfv0G5v1yXOyPy9B04AHTuq4G4MMdrdzysWI6bcJQL3?= =?iso-8859-1?Q?awaXj3d1Hn22qZKO7/1jZhwxytfjal1mXSdg5RaRx1/nbyWYVBsdHlcWbC?= =?iso-8859-1?Q?FjEW45PdJB7sJ/vp6xnLK21fGadAcq6nXvCRE0YsHTYd4U7MJWbcJvfcmq?= =?iso-8859-1?Q?N41OEPgeSII+kJ74uDIesP7sSVkYxIHD8rfL8Xf5oVKdLB3kW50fZqBiFt?= =?iso-8859-1?Q?nvR/2mOpDiBaU4oZ0KsLWNTExnEgOj4s9BqQvVNeU0t7qhqYuQQPbvY/Gj?= =?iso-8859-1?Q?UrlQ=3D=3D?= X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 7536186b-48b6-4d3f-ddf3-08ddec910f9e X-MS-Exchange-CrossTenant-AuthSource: AM8PR04MB7779.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 05 Sep 2025 15:29:53.5102 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: bXtql546y/ZhWolAVn7hWPdhX7EYZVV7dIGo6Psb0Br4xbDrWF/BCR8OoVRYIU4UUhObb0d5lYhg3z9mE9A1fQ== X-MS-Exchange-Transport-CrossTenantHeadersStamped: GVXPR04MB10021 On Fri, Sep 05, 2025 at 02:44:33PM +0000, Josua Mayer wrote: > >> Do you have a specific format in mind? > > I have a prototype implementation based on v5.15 using properties as below > > (I am not sure this is the best format though, DT maintainers may have opinions): > > > > serdes_1_lane_g: phy@6 { > >     reg = <6>; > >     #phy-cells = <0>; > >     fsl,eq-names = "10gbase-r", "25gbase-r"; > >     fsl,eq-type = "3-tap", "3-tap"; > >     fsl,eq-preq-sign = "positive", "positive"; > >     fsl,eq-preq-rate = "1.33", "1.33"; > >     fsl,eq-post1q-sign = "negative", "negative"; > >     fsl,eq-post1q-rate = "1.26", "1.26"; > >     fsl,eq-amp-red = "1.000", "1.000"; > >     fsl,eq-adaptive = <32>, <32>; > > }; > > > > I imagine a parameters sub-node per protocol may be more readable. > > > > The best description would be generic enough to cover pci and sata, too. > > > > Perhaps: > > > > serdes_1_lane_g: phy@6 { > >     reg = <6>; > >     #phy-cells = <0>; > >     fsl,eq-params = <&serdes_1_lane_g_eq_10g>, <&serdes_1_lane_g_eq_sata>; > > fsl,lane-modes = "xfi", "sata"; > > ^^ Would be mroe elegant, as it can at the same time explain which modes > a specific lane supports generally. > > Then eq-params is an optional list with specific parameters, some of > which can be shared between different modes (40g/10g) > > >     serdes_1_lane_g_eq_10g: eq-params-0 { > >         /* compare downstream enum lynx_28g_lane_mode */ > >         fsl,lane-protocol = "xfi"; > >         fsl,eq-type = "3-tap"; > >         fsl,eq-preq-sign = "positive"; > >         fsl,eq-preq-rate = "1.33"; > >         fsl,eq-post1q-sign = "negative"; > >         fsl,eq-post1q-rate = "1.26"; > >         fsl,eq-amp-red = "1.000"; > >         fsl,eq-adaptive = <32>; > >     }; > >      > >     serdes_1_lane_g_eq_sata: eq-1 { > >         /* compare downstream enum lynx_28g_lane_mode */ > >         /* example parameters, do not use for sata */ > >         fsl,lane-mode = "pci"; > >         fsl,eq-type = "3-tap"; > >         fsl,eq-preq-sign = "positive"; > >         fsl,eq-preq-rate = "1.33"; > >         fsl,eq-post1q-sign = "negative"; > >         fsl,eq-post1q-rate = "1.26"; > >         fsl,eq-amp-red = "1.000"; > >         fsl,eq-adaptive = <32>; > >     }; > > }; Why stop the eq-params reuse at "per lane"? Why not make these global nodes, like SFP cages? It's imaginable your pre-emphasis settings might be the same across the board, for both SerDes #1 and #2 lanes. Also, let's take what is upstream now as a starting point. Currently the driver has #phy-cells = <1> (i.e. the "phys" phandle is to the SerDes, not to individual lanes). Wouldn't we want to keep it that way, and make the SerDes lane sub-nodes optional, only in case they have phandles to custom pre-emphasis settings? If they don't, use the driver default pre-emphasis. > >> In the circumstance you describe, isn't your fix just "code after return"? > >> How would have lynx_28g_set_mode(PHY_MODE_ETHERNET, PHY_INTERFACE_MODE_2500BASEX) > >> gotten past the lynx_28g_supports_interface() test without being rejected? > > v6.6.6.52-2.2.0 release, .set_mode: > > > > lynx_28g_set_mode->lynx_28g_set_link_mode->lynx_28g_set_lane_mode->lynx_28g_pll_get > > > > does not check lynx_28g_supports_interface. > > > >> The driver would have needed to suffer some pretty serious modifications > >> to allow this to happen, and I'm not happy with the fact that it's changed > >> to handle incorrect downstream changes, without at least a complete > >> description. > > Point of my submitted patch was merely to guard an unchecked pointer, > > generating appropriate error with enough explanation for non-maintainers. > > > > I debated using BUG_ON instead of warn. Sorry for maybe being obtuse. You're saying you added code in mainline to check for a condition that exists only in downstream lf-6.6.52-2.2.0? Why?