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(v133-18-108-210.vir.kagoya.net. [133.18.108.210]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-b4cd3095df7sm19940233a12.36.2025.09.05.11.13.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 05 Sep 2025 11:13:14 -0700 (PDT) From: ChenMiao To: Stafford Horne Cc: Linux Kernel , Linux OpenRISC , chenmiao Subject: [PATCH v5 4/4] openrisc: Add jump label support Date: Fri, 5 Sep 2025 18:12:58 +0000 Message-ID: <20250905181258.9430-5-chenmiao.ku@gmail.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20250905181258.9430-1-chenmiao.ku@gmail.com> References: <20250905181258.9430-1-chenmiao.ku@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit From: chenmiao Supported a complete jump_label implementation based on the ARM64 and RV64 version and add the CONFIG_JUMP_LABEL=y to the defconfig. Testing was conducted using a dedicated test module jump-label-test, provided in the link below. For detailed steps, please refer to the README also at the provided link. Link: https://github.com/ChenMiaoi/GSoC-2025-Final-Report/tree/main/tests/jump-label-test Test Environment: - Hardware: QEMU emulated OR1K - Kernel Version: 6.17.0-rc3-dirty - Configs: CONFIG_MODULES=y,CONFIG_MODULE_UNLOAD=y - Toolchain: or1k-none-linux-musl-gcc 15.1.0 Test Results: $ insmod jump_label_test.ko [ 32.590000] Jump label performance test module loaded [ 35.250000] Normal branch time: 1241327150 ns (124 ns per iteration) [ 35.250000] Jump label (false) time: 706422700 ns (70 ns per iteration) [ 35.250000] Jump label (true) time: 708913450 ns (70 ns per iteration) $ rmmod jump_label_test.ko [ 72.210000] Jump label test module unloaded The results show approximately 43% improvement in branch performance when using jump labels compared to traditional branches. Link: https://lore.kernel.org/openrisc/aLsZ9S3X0OpKy1RM@antec/T/#u Signed-off-by: chenmiao --- Changes in V5: - Removed some unnecessary curly braces and streamlined parts of the code. Changes in V4: - Add appropriate comments. Changes in V3: - Ensure the two defconfig using the make savedefconfig. - modify the __ASSEMBLY__ to __ASSEMBLER__, modify the __ASM_JUMP_LABEL_H to __ASM_OPENRISC_JUMP_LABEL_H and remove invalid comment. Changes in V2: - using the patch_insn_write(void *addr, u32 insn) not the const void *insn. - add new macro OPENRISC_INSN_NOP in insn-def.h to use. Signed-off-by: chenmiao --- .../core/jump-labels/arch-support.txt | 2 +- arch/openrisc/Kconfig | 2 + arch/openrisc/configs/or1ksim_defconfig | 1 + arch/openrisc/configs/virt_defconfig | 1 + arch/openrisc/include/asm/insn-def.h | 3 + arch/openrisc/include/asm/jump_label.h | 72 +++++++++++++++++++ arch/openrisc/kernel/Makefile | 1 + arch/openrisc/kernel/jump_label.c | 51 +++++++++++++ arch/openrisc/kernel/setup.c | 2 + 9 files changed, 134 insertions(+), 1 deletion(-) create mode 100644 arch/openrisc/include/asm/jump_label.h create mode 100644 arch/openrisc/kernel/jump_label.c diff --git a/Documentation/features/core/jump-labels/arch-support.txt b/Documentation/features/core/jump-labels/arch-support.txt index ccada815569f..683de7c15058 100644 --- a/Documentation/features/core/jump-labels/arch-support.txt +++ b/Documentation/features/core/jump-labels/arch-support.txt @@ -17,7 +17,7 @@ | microblaze: | TODO | | mips: | ok | | nios2: | TODO | - | openrisc: | TODO | + | openrisc: | ok | | parisc: | ok | | powerpc: | ok | | riscv: | ok | diff --git a/arch/openrisc/Kconfig b/arch/openrisc/Kconfig index b38fee299bc4..9156635dd264 100644 --- a/arch/openrisc/Kconfig +++ b/arch/openrisc/Kconfig @@ -24,6 +24,8 @@ config OPENRISC select GENERIC_PCI_IOMAP select GENERIC_IOREMAP select GENERIC_CPU_DEVICES + select HAVE_ARCH_JUMP_LABEL + select HAVE_ARCH_JUMP_LABEL_RELATIVE select HAVE_PCI select HAVE_UID16 select HAVE_PAGE_SIZE_8KB diff --git a/arch/openrisc/configs/or1ksim_defconfig b/arch/openrisc/configs/or1ksim_defconfig index 58e27d8fdb4e..769705ac24d5 100644 --- a/arch/openrisc/configs/or1ksim_defconfig +++ b/arch/openrisc/configs/or1ksim_defconfig @@ -10,6 +10,7 @@ CONFIG_EXPERT=y # CONFIG_KALLSYMS is not set CONFIG_BUILTIN_DTB_NAME="or1ksim" CONFIG_HZ_100=y +CONFIG_JUMP_LABEL=y CONFIG_MODULES=y # CONFIG_BLOCK is not set CONFIG_SLUB_TINY=y diff --git a/arch/openrisc/configs/virt_defconfig b/arch/openrisc/configs/virt_defconfig index 8a581e932766..a93a3e1e4f87 100644 --- a/arch/openrisc/configs/virt_defconfig +++ b/arch/openrisc/configs/virt_defconfig @@ -12,6 +12,7 @@ CONFIG_NR_CPUS=8 CONFIG_SMP=y CONFIG_HZ_100=y # CONFIG_OPENRISC_NO_SPR_SR_DSX is not set +CONFIG_JUMP_LABEL=y # CONFIG_COMPAT_BRK is not set CONFIG_NET=y CONFIG_PACKET=y diff --git a/arch/openrisc/include/asm/insn-def.h b/arch/openrisc/include/asm/insn-def.h index e28a9a9604fc..1e0c028a5b95 100644 --- a/arch/openrisc/include/asm/insn-def.h +++ b/arch/openrisc/include/asm/insn-def.h @@ -9,4 +9,7 @@ /* or1k instructions are always 32 bits. */ #define OPENRISC_INSN_SIZE 4 +/* or1k nop instruction code */ +#define OPENRISC_INSN_NOP 0x15000000U + #endif /* __ASM_OPENRISC_INSN_DEF_H */ diff --git a/arch/openrisc/include/asm/jump_label.h b/arch/openrisc/include/asm/jump_label.h new file mode 100644 index 000000000000..3ec0f4e19f9c --- /dev/null +++ b/arch/openrisc/include/asm/jump_label.h @@ -0,0 +1,72 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (C) 2025 Chen Miao + * + * Based on arch/arm/include/asm/jump_label.h + */ +#ifndef __ASM_OPENRISC_JUMP_LABEL_H +#define __ASM_OPENRISC_JUMP_LABEL_H + +#ifndef __ASSEMBLER__ + +#include +#include + +#define HAVE_JUMP_LABEL_BATCH + +#define JUMP_LABEL_NOP_SIZE OPENRISC_INSN_SIZE + +/** + * JUMP_TABLE_ENTRY - Create a jump table entry + * @key: Jump key identifier (typically a symbol address) + * @label: Target label address + * + * This macro creates a jump table entry in the dedicated kernel section (__jump_table). + * Each entry contains the following information: + * Offset from current instruction to jump instruction (1b - .) + * Offset from current instruction to target label (label - .) + * Offset from current instruction to key identifier (key - .) + */ +#define JUMP_TABLE_ENTRY(key, label) \ + ".pushsection __jump_table, \"aw\" \n\t" \ + ".align 4 \n\t" \ + ".long 1b - ., " label " - . \n\t" \ + ".long " key " - . \n\t" \ + ".popsection \n\t" + +#define ARCH_STATIC_BRANCH_ASM(key, label) \ + ".align 4 \n\t" \ + "1: l.nop \n\t" \ + " l.nop \n\t" \ + JUMP_TABLE_ENTRY(key, label) + +static __always_inline bool arch_static_branch(struct static_key *const key, + const bool branch) +{ + asm goto (ARCH_STATIC_BRANCH_ASM("%0", "%l[l_yes]") + ::"i"(&((char *)key)[branch])::l_yes); + + return false; +l_yes: + return true; +} + +#define ARCH_STATIC_BRANCH_JUMP_ASM(key, label) \ + ".align 4 \n\t" \ + "1: l.j " label " \n\t" \ + " l.nop \n\t" \ + JUMP_TABLE_ENTRY(key, label) + +static __always_inline bool +arch_static_branch_jump(struct static_key *const key, const bool branch) +{ + asm goto (ARCH_STATIC_BRANCH_JUMP_ASM("%0", "%l[l_yes]") + ::"i"(&((char *)key)[branch])::l_yes); + + return false; +l_yes: + return true; +} + +#endif /* __ASSEMBLER__ */ +#endif /* __ASM_OPENRISC_JUMP_LABEL_H */ diff --git a/arch/openrisc/kernel/Makefile b/arch/openrisc/kernel/Makefile index f0957ce16d6b..19e0eb94f2eb 100644 --- a/arch/openrisc/kernel/Makefile +++ b/arch/openrisc/kernel/Makefile @@ -9,6 +9,7 @@ obj-y := head.o setup.o or32_ksyms.o process.o dma.o \ traps.o time.o irq.o entry.o ptrace.o signal.o \ sys_call_table.o unwinder.o cacheinfo.o +obj-$(CONFIG_JUMP_LABEL) += jump_label.o obj-$(CONFIG_SMP) += smp.o sync-timer.o obj-$(CONFIG_STACKTRACE) += stacktrace.o obj-$(CONFIG_MODULES) += module.o diff --git a/arch/openrisc/kernel/jump_label.c b/arch/openrisc/kernel/jump_label.c new file mode 100644 index 000000000000..ab7137c23b46 --- /dev/null +++ b/arch/openrisc/kernel/jump_label.c @@ -0,0 +1,51 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (C) 2025 Chen Miao + * + * Based on arch/arm/kernel/jump_label.c + */ +#include +#include +#include +#include +#include +#include + +bool arch_jump_label_transform_queue(struct jump_entry *entry, + enum jump_label_type type) +{ + void *addr = (void *)jump_entry_code(entry); + u32 insn; + + if (type == JUMP_LABEL_JMP) { + long offset; + + offset = jump_entry_target(entry) - jump_entry_code(entry); + /* + * The actual maximum range of the l.j instruction's offset is -134,217,728 + * ~ 134,217,724 (sign 26-bit imm). + * For the original jump range, we need to right-shift N by 2 to obtain the + * instruction's offset. + */ + WARN_ON_ONCE(offset < -134217728 || offset > 134217724); + + /* 26bit imm mask */ + offset = (offset >> 2) & 0x03ffffff; + + insn = offset; + } else { + insn = OPENRISC_INSN_NOP; + } + + if (early_boot_irqs_disabled) + copy_to_kernel_nofault(addr, &insn, sizeof(insn)); + else + patch_insn_write(addr, insn); + + return true; +} + +void arch_jump_label_transform_apply(void) +{ + kick_all_cpus_sync(); +} diff --git a/arch/openrisc/kernel/setup.c b/arch/openrisc/kernel/setup.c index a9fb9cc6779e..000a9cc10e6f 100644 --- a/arch/openrisc/kernel/setup.c +++ b/arch/openrisc/kernel/setup.c @@ -249,6 +249,8 @@ void __init setup_arch(char **cmdline_p) initrd_below_start_ok = 1; } #endif + /* perform jump_table sorting before paging_init locks down read only memory */ + jump_label_init(); /* paging_init() sets up the MMU and marks all pages as reserved */ paging_init(); -- 2.45.2