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Received: from AM8PR04MB7779.eurprd04.prod.outlook.com (2603:10a6:20b:24b::14) by DU7PR04MB11091.eurprd04.prod.outlook.com (2603:10a6:10:5b4::15) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9115.13; Mon, 8 Sep 2025 06:16:11 +0000 Received: from AM8PR04MB7779.eurprd04.prod.outlook.com ([fe80::b067:7ceb:e3d7:6f93]) by AM8PR04MB7779.eurprd04.prod.outlook.com ([fe80::b067:7ceb:e3d7:6f93%5]) with mapi id 15.20.9115.007; Mon, 8 Sep 2025 06:16:11 +0000 From: Mike Looijmans To: dri-devel@lists.freedesktop.org CC: Mike Looijmans , Andrzej Hajda , Conor Dooley , David Airlie , Jernej Skrabec , Jonas Karlman , Krzysztof Kozlowski , Laurent Pinchart , Maarten Lankhorst , Maxime Ripard , Neil Armstrong , Rob Herring , Robert Foss , Simona Vetter , Thomas Zimmermann , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v5 0/2] drm: bridge: Add TI tmds181 and sn65dp159 driver Date: Mon, 8 Sep 2025 08:15:56 +0200 Message-ID: <20250908061605.76787-1-mike.looijmans@topic.nl> X-Mailer: git-send-email 2.43.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain X-ClientProxiedBy: AM9P195CA0021.EURP195.PROD.OUTLOOK.COM (2603:10a6:20b:21f::26) To AM8PR04MB7779.eurprd04.prod.outlook.com (2603:10a6:20b:24b::14) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-TrafficTypeDiagnostic: AM8PR04MB7779:EE_|DU7PR04MB11091:EE_|AMS0EPF00000190:EE_|GVXPR04MB11020:EE_ X-MS-Office365-Filtering-Correlation-Id: e83eb180-7f4e-422c-a52c-08ddee9f3851 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam-Untrusted: BCL:0;ARA:13230040|366016|376014|1800799024|52116014|7416014|38350700014; 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X-OriginatorOrg: topic.nl X-MS-Exchange-CrossTenant-OriginalArrivalTime: 08 Sep 2025 06:16:16.8008 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: e83eb180-7f4e-422c-a52c-08ddee9f3851 X-MS-Exchange-CrossTenant-Id: 449607a5-3517-482d-8d16-41dd868cbda3 X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=449607a5-3517-482d-8d16-41dd868cbda3;Ip=[20.93.157.195];Helo=[westeu11-emailsignatures-cloud.codetwo.com] X-MS-Exchange-CrossTenant-AuthSource: AMS0EPF00000190.eurprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: GVXPR04MB11020 In the past I've seen (and contributed to) hacks that model the chips as phy or even (really!) clock drivers. Since the chip usually sits between a signal that is (almost) HDMI and a HDMI connector, I decided to stop lying and write it as a DRM bridge driver. Our experience with these chips is that they work best under manual control enabling them only once the signal is active. At low resolutions (under 4k)= , the optimal setting is usually to only use redriver mode. Setting the termination to 150-300 Ohms improves EMC performance at lower resolutions, hence the driver enables 75-150 Ohms for HDMI2 modes and defaults to 150-300 Ohm termination for other modes. Changes in v5: ti,equalizer and ti,mode changed to enum Rename ti,slew-rate to slew-rate Make properties conditional for DP159/TMDS181 Remove ti,dvi-mode (always set to avoid conflict) Really added vcc/vdd regulator support "oe" gpio is now "reset" (reversed logic) devicetree enums ti,equalizer and ti,mode Always disable HDMI_SEL (formerly "dvi-mode") Changes in v4: Use fallback compatible dev_err_probe, this_module, of_match_ptr Use fallback compatible Add vcc-supply and vdd-supply Changes in v3: Fix duplicate links Add vcc-supply and vdd-supply Fix missing type for ti,slew-rate Lower-case hex values and use defines for EYESCAN registers Remove equalizer code (unlikely to be used) Remove attributes (no longer useful, undocumented) Fix build for 6.17 kernel Use devm_drm_bridge_alloc Sort includes and add linux/bitfield.h Check chip type and complain on mismatch Changes in v2: Document driver specific bindings like slew-rate and threshold Use atomic_enable/disable Use #defines for bit fields in registers Allow HDMI 2 compliance Filter modes on clock range Use cross-over pixel frequency instead of manual overides Devicetree bindings according to standards Mike Looijmans (2): dt-bindings: drm/bridge: ti-tmds181: Add TI TMDS181 and SN65DP159 bindings drm: bridge: Add TI tmds181 and sn65dp159 driver .../bindings/display/bridge/ti,tmds181.yaml | 170 +++++++ drivers/gpu/drm/bridge/Kconfig | 11 + drivers/gpu/drm/bridge/Makefile | 1 + drivers/gpu/drm/bridge/ti-tmds181.c | 427 ++++++++++++++++++ 4 files changed, 609 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/bridge/ti,tmd= s181.yaml create mode 100644 drivers/gpu/drm/bridge/ti-tmds181.c --=20 2.43.0 base-commit: 53e760d8949895390e256e723e7ee46618310361 branch: drm-ti-tmds181 Met vriendelijke groet / kind regards,=0A= =0A= Mike Looijmans=0A= System Expert=0A= =0A= =0A= TOPIC Embedded Products B.V.=0A= Materiaalweg 4, 5681 RJ Best=0A= The Netherlands=0A= =0A= T: +31 (0) 499 33 69 69=0A= E: mike.looijmans@topic.nl=0A= W: www.topic.nl=0A= =0A= Please consider the environment before printing this e-mail=0A=