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[79.12.163.148]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-b07b30da43esm166632966b.14.2025.09.11.10.02.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 11 Sep 2025 10:02:15 -0700 (PDT) From: Anna Maniscalco Subject: [PATCH 0/2] Make hang check aware of preemption Date: Thu, 11 Sep 2025 19:01:03 +0200 Message-Id: <20250911-preemption_aware_hangcheck-v1-0-974819876819@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit X-B4-Tracking: v=1; b=H4sIAE8Aw2gC/6tWKk4tykwtVrJSqFYqSi3LLM7MzwNyDHUUlJIzE vPSU3UzU4B8JSMDI1MDS0ND3YKi1NTcghKgsvjE8sSi1HiQquSM1ORsXYskyyRjcwOL1LTkZCW gAUClaZkVYMOjY2trAfxZh5lsAAAA X-Change-ID: 20250911-preemption_aware_hangcheck-8b9b3708efcc To: Rob Clark , Sean Paul , Konrad Dybcio , Dmitry Baryshkov , Abhinav Kumar , Jessica Zhang , Marijn Suijten , David Airlie , Simona Vetter Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org, Anna Maniscalco X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1757610134; l=1269; i=anna.maniscalco2000@gmail.com; s=20240815; h=from:subject:message-id; bh=8R6+RH+mErEiPPdYOOstKc0iqhFv59uOICnzE3FZ1Uc=; b=pxPb5b9aCV51Le4kGnwLMyZIQhK3o8Ug+ZnmnU6U5fkPwQolNF6qcJjTKzmy8b1c8ePzdfTmi FM4IB/E95smA3LI7KRo9fVl+MPFLaG0croAd8N0tJ33O723VIYSQ2nd X-Developer-Key: i=anna.maniscalco2000@gmail.com; a=ed25519; pk=0zicFb38tVla+iHRo4kWpOMsmtUrpGBEa7LkFF81lyY= Ever since we added support for preemption hangcheck has been somewhat broken as it is not aware of multiple rings. In some cases it might not recognize that one ring is stuck if the gpu switches in and out of it. Signed-off-by: Anna Maniscalco --- Anna Maniscalco (2): drm/msm/registers: Sync GPU registers from mesa drm/msm: preemption aware hangcheck drivers/gpu/drm/msm/adreno/a5xx_gpu.c | 3 +- drivers/gpu/drm/msm/adreno/a6xx_gmu.c | 3 +- drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 28 +++++++++++++-- drivers/gpu/drm/msm/adreno/a6xx_gpu.h | 1 + drivers/gpu/drm/msm/adreno/a6xx_preempt.c | 25 +++++++++---- drivers/gpu/drm/msm/adreno/adreno_gpu.c | 3 +- drivers/gpu/drm/msm/msm_gpu.c | 51 +++++++++++++++++++++------ drivers/gpu/drm/msm/msm_gpu.h | 3 ++ drivers/gpu/drm/msm/msm_ringbuffer.h | 6 ++++ drivers/gpu/drm/msm/registers/adreno/a6xx.xml | 1 + 10 files changed, 103 insertions(+), 21 deletions(-) --- base-commit: b5bad77e1e3c7249e4c0c88f98477e1ee7669b63 change-id: 20250911-preemption_aware_hangcheck-8b9b3708efcc Best regards, -- Anna Maniscalco