From: Leo Yan <leo.yan@arm.com>
To: Junhao He <hejunhao3@huawei.com>
Cc: suzuki.poulose@arm.com, james.clark@arm.com,
anshuman.khandual@arm.com, coresight@lists.linaro.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, linuxarm@huawei.com,
jonathan.cameron@huawei.com, yangyicong@huawei.com,
prime.zeng@hisilicon.com
Subject: Re: [PATCH v3 1/3] coresight: tmc: Add missing doc including reading and etr_mode of struct tmc_drvdata
Date: Thu, 11 Sep 2025 10:38:07 +0100 [thread overview]
Message-ID: <20250911093807.GE12516@e132581.arm.com> (raw)
In-Reply-To: <20250818080600.418425-2-hejunhao3@huawei.com>
On Mon, Aug 18, 2025 at 04:05:58PM +0800, Junhao He wrote:
> From: Yicong Yang <yangyicong@hisilicon.com>
>
> tmc_drvdata::reading is used to indicate whether a reading process
> is performed through /dev/xyz.tmc.
> tmc_drvdata::etr_mode is used to store the Coresight TMC-ETR buffer
> mode selected by the user.
> Document them.
>
> Reviewed-by: James Clark <james.clark@linaro.org>
> Signed-off-by: Yicong Yang <yangyicong@hisilicon.com>
> Signed-off-by: Junhao He <hejunhao3@huawei.com>
Reviewed-by: Leo Yan <leo.yan@arm.com>
> ---
> drivers/hwtracing/coresight/coresight-tmc.h | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/drivers/hwtracing/coresight/coresight-tmc.h b/drivers/hwtracing/coresight/coresight-tmc.h
> index 6541a27a018e..9daa2680cfb6 100644
> --- a/drivers/hwtracing/coresight/coresight-tmc.h
> +++ b/drivers/hwtracing/coresight/coresight-tmc.h
> @@ -220,6 +220,7 @@ struct tmc_resrv_buf {
> * @pid: Process ID of the process that owns the session that is using
> * this component. For example this would be the pid of the Perf
> * process.
> + * @reading: buffer's in the reading through "/dev/xyz.tmc" entry
> * @stop_on_flush: Stop on flush trigger user configuration.
> * @buf: Snapshot of the trace data for ETF/ETB.
> * @etr_buf: details of buffer used in TMC-ETR
> @@ -232,6 +233,7 @@ struct tmc_resrv_buf {
> * @trigger_cntr: amount of words to store after a trigger.
> * @etr_caps: Bitmask of capabilities of the TMC ETR, inferred from the
> * device configuration register (DEVID)
> + * @etr_mode: User preferred mode of the ETR device, default auto mode.
> * @idr: Holds etr_bufs allocated for this ETR.
> * @idr_mutex: Access serialisation for idr.
> * @sysfs_buf: SYSFS buffer for ETR.
> --
> 2.33.0
>
next prev parent reply other threads:[~2025-09-11 9:38 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-08-18 8:05 [PATCH v3 0/3] Coresight TMC-ETR some bugfixes and cleanups Junhao He
2025-08-18 8:05 ` [PATCH v3 1/3] coresight: tmc: Add missing doc including reading and etr_mode of struct tmc_drvdata Junhao He
2025-09-11 9:38 ` Leo Yan [this message]
2025-08-18 8:05 ` [PATCH v3 2/3] coresight: tmc: refactor the tmc-etr mode setting to avoid race conditions Junhao He
2025-09-18 9:15 ` Yicong Yang
2025-09-18 13:29 ` Suzuki K Poulose
2025-09-19 10:45 ` hejunhao
2025-08-18 8:06 ` [PATCH v3 3/3] coresight: tmc: Decouple the perf buffer allocation from sysfs mode Junhao He
2025-09-09 13:11 ` [PATCH v3 0/3] Coresight TMC-ETR some bugfixes and cleanups hejunhao
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