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From: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
To: AngeloGioacchino Del Regno
	<angelogioacchino.delregno@collabora.com>,
	 Boris Brezillon <boris.brezillon@collabora.com>,
	 Steven Price <steven.price@arm.com>,
	Liviu Dudau <liviu.dudau@arm.com>,
	 Maarten Lankhorst <maarten.lankhorst@linux.intel.com>,
	 Maxime Ripard <mripard@kernel.org>,
	Thomas Zimmermann <tzimmermann@suse.de>,
	 David Airlie <airlied@gmail.com>,
	Simona Vetter <simona@ffwll.ch>,  Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	 Conor Dooley <conor+dt@kernel.org>,
	 Matthias Brugger <matthias.bgg@gmail.com>,
	 MyungJoo Ham <myungjoo.ham@samsung.com>,
	 Kyungmin Park <kyungmin.park@samsung.com>,
	 Chanwoo Choi <cw00.choi@samsung.com>,
	Jassi Brar <jassisinghbrar@gmail.com>,
	 Kees Cook <kees@kernel.org>,
	"Gustavo A. R. Silva" <gustavoars@kernel.org>,
	 Chia-I Wu <olvaffe@gmail.com>, Chen-Yu Tsai <wenst@chromium.org>
Cc: kernel@collabora.com, dri-devel@lists.freedesktop.org,
	 devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	 linux-arm-kernel@lists.infradead.org,
	linux-mediatek@lists.infradead.org,  linux-pm@vger.kernel.org,
	linux-hardening@vger.kernel.org,
	 Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
Subject: [PATCH v2 01/10] dt-bindings: gpu: mali-valhall-csf: add mediatek,mt8196-mali variant
Date: Fri, 12 Sep 2025 20:37:00 +0200	[thread overview]
Message-ID: <20250912-mt8196-gpufreq-v2-1-779a8a3729d9@collabora.com> (raw)
In-Reply-To: <20250912-mt8196-gpufreq-v2-0-779a8a3729d9@collabora.com>

The Mali-based GPU on the MediaTek MT8196 SoC uses a separate MCU to
control the power and frequency of the GPU.

It lets us omit the OPP tables from the device tree, as those can now be
enumerated at runtime from the MCU.

Add the mediatek,mt8196-mali compatible, and a performance-domains
property which points to the MCU's device tree node in this case. It's
required on mt8196 devices.

Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
---
 .../bindings/gpu/arm,mali-valhall-csf.yaml         | 32 +++++++++++++++++++++-
 1 file changed, 31 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-valhall-csf.yaml b/Documentation/devicetree/bindings/gpu/arm,mali-valhall-csf.yaml
index a5b4e00217587c5d1f889094e2fff7b76e6148eb..163b4457f7f25dcdd509c558558a73694521c96d 100644
--- a/Documentation/devicetree/bindings/gpu/arm,mali-valhall-csf.yaml
+++ b/Documentation/devicetree/bindings/gpu/arm,mali-valhall-csf.yaml
@@ -19,6 +19,7 @@ properties:
       - items:
           - enum:
               - rockchip,rk3588-mali
+              - mediatek,mt8196-mali
           - const: arm,mali-valhall-csf   # Mali Valhall GPU model/revision is fully discoverable
 
   reg:
@@ -53,6 +54,9 @@ properties:
   opp-table:
     type: object
 
+  performance-domains:
+    maxItems: 1
+
   power-domains:
     minItems: 1
     maxItems: 5
@@ -91,7 +95,6 @@ required:
   - interrupts
   - interrupt-names
   - clocks
-  - mali-supply
 
 additionalProperties: false
 
@@ -105,9 +108,24 @@ allOf:
       properties:
         clocks:
           minItems: 3
+        performance-domains: false
         power-domains:
           maxItems: 1
         power-domain-names: false
+      required:
+        - mali-supply
+  - if:
+      properties:
+        compatible:
+          contains:
+            const: mediatek,mt8196-mali
+    then:
+      properties:
+        mali-supply: false
+        sram-supply: false
+        operating-points-v2: false
+      required:
+        - performance-domains
 
 examples:
   - |
@@ -143,5 +161,17 @@ examples:
             };
         };
     };
+  - |
+    gpu@48000000 {
+        compatible = "mediatek,mt8196-mali", "arm,mali-valhall-csf";
+        reg = <0x48000000 0x480000>;
+        clocks = <&mfgpll 0>;
+        clock-names = "core";
+        interrupts = <GIC_SPI 606 IRQ_TYPE_LEVEL_HIGH 0>,
+                     <GIC_SPI 605 IRQ_TYPE_LEVEL_HIGH 0>,
+                     <GIC_SPI 604 IRQ_TYPE_LEVEL_HIGH 0>;
+        interrupt-names = "job", "mmu", "gpu";
+        performance-domains = <&gpufreq>;
+    };
 
 ...

-- 
2.51.0


  reply	other threads:[~2025-09-12 18:38 UTC|newest]

Thread overview: 27+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-09-12 18:36 [PATCH v2 00/10] MT8196 GPU Frequency/Power Control Support Nicolas Frattaroli
2025-09-12 18:37 ` Nicolas Frattaroli [this message]
2025-09-12 21:23   ` [PATCH v2 01/10] dt-bindings: gpu: mali-valhall-csf: add mediatek,mt8196-mali variant Chia-I Wu
2025-09-12 18:37 ` [PATCH v2 02/10] dt-bindings: devfreq: add mt8196-gpufreq binding Nicolas Frattaroli
2025-09-15 10:28   ` AngeloGioacchino Del Regno
2025-09-12 18:37 ` [PATCH v2 03/10] dt-bindings: sram: Add compatible for mediatek,mt8196-gpufreq-sram Nicolas Frattaroli
2025-09-12 18:37 ` [PATCH v2 04/10] dt-bindings: mailbox: Add MT8196 GPUEB Mailbox Nicolas Frattaroli
2025-09-15 17:54   ` Conor Dooley
2025-09-12 18:37 ` [PATCH v2 05/10] mailbox: add MediaTek GPUEB IPI mailbox Nicolas Frattaroli
2025-09-12 22:11   ` Chia-I Wu
2025-09-15 12:38     ` Nicolas Frattaroli
2025-09-16  4:55       ` Chia-I Wu
2025-09-16  9:03         ` Nicolas Frattaroli
2025-09-12 18:37 ` [PATCH v2 06/10] drm/panthor: call into devfreq for current frequency Nicolas Frattaroli
2025-09-15 10:35   ` AngeloGioacchino Del Regno
2025-09-12 18:37 ` [PATCH v2 07/10] drm/panthor: move panthor_devfreq struct to header Nicolas Frattaroli
2025-09-15 10:35   ` AngeloGioacchino Del Regno
2025-09-12 18:37 ` [PATCH v2 08/10] drm/panthor: devfreq: expose get_dev_status and make it more generic Nicolas Frattaroli
2025-09-12 18:37 ` [PATCH v2 09/10] drm/panthor: devfreq: add pluggable devfreq providers Nicolas Frattaroli
2025-09-12 22:53   ` Chia-I Wu
2025-09-15 13:09     ` Nicolas Frattaroli
2025-09-16  6:17       ` Chia-I Wu
2025-09-16  9:11         ` Nicolas Frattaroli
2025-09-12 18:37 ` [PATCH v2 10/10] drm/panthor: add support for MediaTek MFlexGraphics Nicolas Frattaroli
2025-09-15 10:28   ` AngeloGioacchino Del Regno
2025-09-15 13:32     ` Nicolas Frattaroli
2025-09-15 13:36       ` AngeloGioacchino Del Regno

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