From: Haibo Chen <haibo.chen@nxp.com>
To: Han Xu <han.xu@nxp.com>, Yogesh Gaur <yogeshgaur.83@gmail.com>,
Mark Brown <broonie@kernel.org>
Cc: linux-spi@vger.kernel.org, imx@lists.linux.dev,
linux-kernel@vger.kernel.org, Haibo Chen <haibo.chen@nxp.com>
Subject: [PATCH 5/5] spi: spi-nxp-fspi: Add OCT-DTR mode support
Date: Tue, 16 Sep 2025 15:56:44 +0800 [thread overview]
Message-ID: <20250916-flexspi-ddr-v1-5-69358b5dc862@nxp.com> (raw)
In-Reply-To: <20250916-flexspi-ddr-v1-0-69358b5dc862@nxp.com>
Add OCT-DTR mode support in default, since flexspi do not supports
swapping bytes on a 16 bit boundary in OCT-DTR mode, so mark swap16
as false.
lx2160a do not support DQS, so add a quirk to disable DTR mode for this
platform.
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
---
drivers/spi/spi-nxp-fspi.c | 18 ++++++++++++++++--
1 file changed, 16 insertions(+), 2 deletions(-)
diff --git a/drivers/spi/spi-nxp-fspi.c b/drivers/spi/spi-nxp-fspi.c
index 15b094e8e892f0b61c1f320bba897fa1f588be91..389cb20872db6d9653a146eac7182b9a4574496b 100644
--- a/drivers/spi/spi-nxp-fspi.c
+++ b/drivers/spi/spi-nxp-fspi.c
@@ -330,6 +330,8 @@
/* Access flash memory using IP bus only */
#define FSPI_QUIRK_USE_IP_ONLY BIT(0)
+/* Disable DTR */
+#define FSPI_QUIRK_DISABLE_DTR BIT(1)
struct nxp_fspi_devtype_data {
unsigned int rxfifo;
@@ -344,7 +346,7 @@ static struct nxp_fspi_devtype_data lx2160a_data = {
.rxfifo = SZ_512, /* (64 * 64 bits) */
.txfifo = SZ_1K, /* (128 * 64 bits) */
.ahb_buf_size = SZ_2K, /* (256 * 64 bits) */
- .quirks = 0,
+ .quirks = FSPI_QUIRK_DISABLE_DTR,
.lut_num = 32,
.little_endian = true, /* little-endian */
};
@@ -1236,6 +1238,13 @@ static const struct spi_controller_mem_ops nxp_fspi_mem_ops = {
};
static const struct spi_controller_mem_caps nxp_fspi_mem_caps = {
+ .dtr = true,
+ .swap16 = false,
+ .per_op_freq = true,
+};
+
+static const struct spi_controller_mem_caps nxp_fspi_mem_caps_quirks = {
+ .dtr = false,
.per_op_freq = true,
};
@@ -1351,7 +1360,12 @@ static int nxp_fspi_probe(struct platform_device *pdev)
ctlr->bus_num = -1;
ctlr->num_chipselect = NXP_FSPI_MAX_CHIPSELECT;
ctlr->mem_ops = &nxp_fspi_mem_ops;
- ctlr->mem_caps = &nxp_fspi_mem_caps;
+
+ if (f->devtype_data->quirks & FSPI_QUIRK_DISABLE_DTR)
+ ctlr->mem_caps = &nxp_fspi_mem_caps_quirks;
+ else
+ ctlr->mem_caps = &nxp_fspi_mem_caps;
+
ctlr->dev.of_node = np;
ret = devm_add_action_or_reset(dev, nxp_fspi_cleanup, f);
--
2.34.1
next prev parent reply other threads:[~2025-09-16 7:57 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-09-16 7:56 [PATCH 0/5] spi: spi-nxp-fspi: add DTR " Haibo Chen
2025-09-16 7:56 ` [PATCH 1/5] spi: spi-nxp-fspi: extract function nxp_fspi_dll_override() Haibo Chen
2025-09-16 15:28 ` Frank Li
2025-09-16 7:56 ` [PATCH 2/5] spi: spi-nxp-fspi: Add the DDR LUT command support Haibo Chen
2025-09-16 15:31 ` Frank Li
2025-09-16 7:56 ` [PATCH 3/5] spi: spi-nxp-fspi: add the support for sample data from DQS pad Haibo Chen
2025-09-16 15:37 ` Frank Li
2025-09-16 7:56 ` [PATCH 4/5] spi: spi-nxp-fspi: correct the clock rate for DTR mode Haibo Chen
2025-09-16 15:39 ` Frank Li
2025-09-16 7:56 ` Haibo Chen [this message]
2025-09-16 15:43 ` [PATCH 5/5] spi: spi-nxp-fspi: Add OCT-DTR mode support Frank Li
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