From: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
To: AngeloGioacchino Del Regno
<angelogioacchino.delregno@collabora.com>,
Boris Brezillon <boris.brezillon@collabora.com>,
Steven Price <steven.price@arm.com>,
Liviu Dudau <liviu.dudau@arm.com>,
Maarten Lankhorst <maarten.lankhorst@linux.intel.com>,
Maxime Ripard <mripard@kernel.org>,
Thomas Zimmermann <tzimmermann@suse.de>,
David Airlie <airlied@gmail.com>,
Simona Vetter <simona@ffwll.ch>, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Matthias Brugger <matthias.bgg@gmail.com>,
MyungJoo Ham <myungjoo.ham@samsung.com>,
Kyungmin Park <kyungmin.park@samsung.com>,
Chanwoo Choi <cw00.choi@samsung.com>,
Jassi Brar <jassisinghbrar@gmail.com>,
Kees Cook <kees@kernel.org>,
"Gustavo A. R. Silva" <gustavoars@kernel.org>,
Chia-I Wu <olvaffe@gmail.com>, Chen-Yu Tsai <wenst@chromium.org>
Cc: kernel@collabora.com, dri-devel@lists.freedesktop.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-mediatek@lists.infradead.org, linux-pm@vger.kernel.org,
linux-hardening@vger.kernel.org,
Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
Subject: [PATCH v3 09/10] drm/panthor: add no_clocks soc_data member for MT8196
Date: Wed, 17 Sep 2025 14:22:40 +0200 [thread overview]
Message-ID: <20250917-mt8196-gpufreq-v3-9-c4ede4b4399e@collabora.com> (raw)
In-Reply-To: <20250917-mt8196-gpufreq-v3-0-c4ede4b4399e@collabora.com>
While panthor does not try to do anything untoward with the core clock
outside of increasing its enable/disable count, the spirit of using DT
to describe hardware, not what drivers need, informs us that on the
MT8196, panthor should work without one, as the true owner of the clocks
in this case is the performance-domain.
Add a boolean to the soc_data struct that tells panthor whether on any
given SoC, it can leave even the core clock NULL. Set it to true for the
MT8196 soc_data instance.
Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
---
drivers/gpu/drm/panthor/panthor_device.c | 3 +++
drivers/gpu/drm/panthor/panthor_device.h | 3 +++
drivers/gpu/drm/panthor/panthor_drv.c | 1 +
3 files changed, 7 insertions(+)
diff --git a/drivers/gpu/drm/panthor/panthor_device.c b/drivers/gpu/drm/panthor/panthor_device.c
index c7033d82cef55c940adc8434231cac6c5a20c288..581901a8e64fdb0946f20af593489fefde1cc05f 100644
--- a/drivers/gpu/drm/panthor/panthor_device.c
+++ b/drivers/gpu/drm/panthor/panthor_device.c
@@ -43,6 +43,9 @@ static int panthor_gpu_coherency_init(struct panthor_device *ptdev)
static int panthor_clk_init(struct panthor_device *ptdev)
{
+ if (ptdev->soc_data && ptdev->soc_data->no_clocks)
+ return 0;
+
ptdev->clks.core = devm_clk_get(ptdev->base.dev, NULL);
if (IS_ERR(ptdev->clks.core))
return dev_err_probe(ptdev->base.dev,
diff --git a/drivers/gpu/drm/panthor/panthor_device.h b/drivers/gpu/drm/panthor/panthor_device.h
index f32c1868bf6d782d99df9dbd0babcea049c917e0..cc8485afdaf865edc89a36823ba75c588a040e0b 100644
--- a/drivers/gpu/drm/panthor/panthor_device.h
+++ b/drivers/gpu/drm/panthor/panthor_device.h
@@ -40,6 +40,9 @@ struct panthor_soc_data {
/** @asn_hash: ASN_HASH values when asn_hash_enable is true. */
u32 asn_hash[3];
+
+ /** @no_clocks: True if clock control is external, not by panthor. */
+ bool no_clocks;
};
/**
diff --git a/drivers/gpu/drm/panthor/panthor_drv.c b/drivers/gpu/drm/panthor/panthor_drv.c
index 4d59d94c353c3ca76f4b98a411c8f8284efafd08..3583ec955a85fe6e383839ec2bde017e1c6a995c 100644
--- a/drivers/gpu/drm/panthor/panthor_drv.c
+++ b/drivers/gpu/drm/panthor/panthor_drv.c
@@ -1687,6 +1687,7 @@ ATTRIBUTE_GROUPS(panthor);
static const struct panthor_soc_data soc_data_mediatek_mt8196 = {
.asn_hash_enable = true,
.asn_hash = { 0xb, 0xe, 0x0, },
+ .no_clocks = true,
};
static const struct of_device_id dt_match[] = {
--
2.51.0
next prev parent reply other threads:[~2025-09-17 12:24 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-09-17 12:22 [PATCH v3 00/10] MT8196 GPU Frequency/Power Control Support Nicolas Frattaroli
2025-09-17 12:22 ` [PATCH v3 01/10] dt-bindings: gpu: mali-valhall-csf: add mediatek,mt8196-mali variant Nicolas Frattaroli
2025-09-17 15:02 ` Rob Herring (Arm)
2025-09-18 0:30 ` Krzysztof Kozlowski
2025-09-18 14:01 ` Nicolas Frattaroli
2025-09-19 4:28 ` Krzysztof Kozlowski
2025-09-19 10:08 ` Nicolas Frattaroli
2025-09-17 12:22 ` [PATCH v3 02/10] dt-bindings: devfreq: add mt8196-gpufreq binding Nicolas Frattaroli
2025-09-18 0:31 ` Krzysztof Kozlowski
2025-09-17 12:22 ` [PATCH v3 03/10] dt-bindings: sram: Add compatible for mediatek,mt8196-gpufreq-sram Nicolas Frattaroli
2025-09-17 12:44 ` AngeloGioacchino Del Regno
2025-09-17 12:22 ` [PATCH v3 04/10] dt-bindings: mailbox: Add MT8196 GPUEB Mailbox Nicolas Frattaroli
2025-09-17 12:46 ` AngeloGioacchino Del Regno
2025-09-17 12:22 ` [PATCH v3 05/10] mailbox: add MediaTek GPUEB IPI mailbox Nicolas Frattaroli
2025-09-17 12:50 ` AngeloGioacchino Del Regno
2025-09-21 5:00 ` Jassi Brar
2025-09-22 12:59 ` Nicolas Frattaroli
2025-09-22 13:19 ` Mark Brown
2025-09-17 12:22 ` [PATCH v3 06/10] drm/panthor: call into devfreq for current frequency Nicolas Frattaroli
2025-09-17 12:22 ` [PATCH v3 07/10] drm/panthor: devfreq: make get_dev_status use get_cur_freq Nicolas Frattaroli
2025-09-17 12:22 ` [PATCH v3 08/10] drm/panthor: devfreq: add pluggable devfreq providers Nicolas Frattaroli
2025-09-17 12:22 ` Nicolas Frattaroli [this message]
2025-09-17 12:43 ` [PATCH v3 09/10] drm/panthor: add no_clocks soc_data member for MT8196 AngeloGioacchino Del Regno
2025-09-17 12:22 ` [PATCH v3 10/10] drm/panthor: add support for MediaTek MFlexGraphics Nicolas Frattaroli
2025-09-17 13:28 ` [PATCH v3 00/10] MT8196 GPU Frequency/Power Control Support Ulf Hansson
2025-09-17 15:44 ` Nicolas Frattaroli
2025-09-18 15:26 ` Ulf Hansson
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