From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 204E830BB9F for ; Wed, 17 Sep 2025 09:37:43 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1758101865; cv=none; b=GjFKHPKb/DIdHQdelbAqLQVMWkSuXRpZeoclUFajLD3nY0fX05AY0Atp/D9i6uTxZZmrgXt/3rjfOdKh493LVqqNuFNMaTQt68+hgR9+ETzEhmpoeLJNd3qzFLdvgaIT5xmiTcR3Hcy+dHMID8Ov7ayAfWvDvkRanMTce0xmbUA= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1758101865; c=relaxed/simple; bh=6d4XnIVUS+sN90b8xMhxbkev2ymPmT7vk9NcKzyjN1o=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=cSliDmr5V37Rln+T/hzsfdly4PryrfkW0v7bfRQXo5ObNOfksn9X9eFsKDHY1swpJqZfBhd1KFKg0UZjFhIE2ex9p6OZLzKxnz1MlUz3Wns4ryAC+7f3ikQhKelye0t1eKvFn7o3SfCsEnNXenUhQr9xFmwCG0ZN2Ex0tBFoWsc= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id CBFC925DC; Wed, 17 Sep 2025 02:37:34 -0700 (PDT) Received: from localhost (e132581.arm.com [10.1.196.87]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 9D55F3F66E; Wed, 17 Sep 2025 02:37:42 -0700 (PDT) Date: Wed, 17 Sep 2025 10:37:40 +0100 From: Leo Yan To: Jie Gan Cc: Carl Worth , Suzuki K Poulose , Mike Leach , James Clark , Alexander Shishkin , Sabrina Dubroca , coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH] coresight: Fix data argument to coresight_enable_helpers Message-ID: <20250917093740.GP12516@e132581.arm.com> References: <20250916224441.3008824-1-carl@os.amperecomputing.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: On Wed, Sep 17, 2025 at 09:35:55AM +0800, Jie Gan wrote: [...] > > diff --git a/drivers/hwtracing/coresight/coresight-core.c b/drivers/hwtracing/coresight/coresight-core.c > > index fa758cc21827..b1077d73c988 100644 > > --- a/drivers/hwtracing/coresight/coresight-core.c > > +++ b/drivers/hwtracing/coresight/coresight-core.c > > @@ -510,7 +510,7 @@ int coresight_enable_path(struct coresight_path *path, enum cs_mode mode, > > type = csdev->type; > > /* Enable all helpers adjacent to the path first */ > > - ret = coresight_enable_helpers(csdev, mode, path); > > + ret = coresight_enable_helpers(csdev, mode, sink_data); > > I dont think we can change back to sink_data since we introduced > coresight_path to wrap 'data' which is needed by the path. This change can fix catu issue but will cause regression for ctcu driver. > I suggest you to add the struct perf_output_handle to the coresight_path, > then retrieving it with data->perf_handle in tmc_etr_get_buffer. > > before: > struct perf_output_handle *handle = data; > > after: > struct coresight_path *path = data; > struct perf_output_handle *handle = path->perf_handle; > > We can assign the perf_output_handle to the coresight_path after we > constructed the coresight_path in perf mode. The suggestion looks good to me. Thanks, Leo