From: John Madieu <john.madieu.xa@bp.renesas.com>
To: conor+dt@kernel.org, daniel.lezcano@linaro.org,
geert+renesas@glider.be, krzk+dt@kernel.org, lukasz.luba@arm.com,
magnus.damm@gmail.com, mturquette@baylibre.com, robh@kernel.org,
rui.zhang@intel.com, sboyd@kernel.org, will@kernel.org
Cc: biju.das.jz@bp.renesas.com, catalin.marinas@arm.com,
devicetree@vger.kernel.org, john.madieu@gmail.com,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org,
linux-renesas-soc@vger.kernel.org, p.zabel@pengutronix.de,
rafael@kernel.org, John Madieu <john.madieu.xa@bp.renesas.com>
Subject: [PATCH v9 1/4] dt-bindings: thermal: r9a09g047-tsu: Document the TSU unit
Date: Wed, 17 Sep 2025 19:01:55 +0200 [thread overview]
Message-ID: <20250917170202.197929-2-john.madieu.xa@bp.renesas.com> (raw)
In-Reply-To: <20250917170202.197929-1-john.madieu.xa@bp.renesas.com>
The Renesas RZ/G3E SoC includes a Thermal Sensor Unit (TSU) block designed
to measure the junction temperature. The device provides real-time
temperature measurements for thermal management, utilizing a single
dedicated channel (channel 1) for temperature sensing.
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: John Madieu <john.madieu.xa@bp.renesas.com>
---
Changes:
v1 -> v2:
* Fixes reg property specifier to get rid of yamlint warnings
* Fixes IRQ name to reflect TSU expectations
v2 -> v3:
* Removees useless 'renesas,tsu-operating-mode' property
v3 -> v4:
* Fixes commit message
* Fixes interrupt description
* Removes trip point definition
v5: no changes
v6: no changes
v7: Adds documentation for 'renesas,tsu-trim' and removes Rb tag from Krzysztof
due to this change
v8: Address Rob's comments (about node naming and line wrapping) and collect
Rb tag
v9: No changes
.../thermal/renesas,r9a09g047-tsu.yaml | 87 +++++++++++++++++++
1 file changed, 87 insertions(+)
create mode 100644 Documentation/devicetree/bindings/thermal/renesas,r9a09g047-tsu.yaml
diff --git a/Documentation/devicetree/bindings/thermal/renesas,r9a09g047-tsu.yaml b/Documentation/devicetree/bindings/thermal/renesas,r9a09g047-tsu.yaml
new file mode 100644
index 000000000000..8d3f3c24f0f2
--- /dev/null
+++ b/Documentation/devicetree/bindings/thermal/renesas,r9a09g047-tsu.yaml
@@ -0,0 +1,87 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/thermal/renesas,r9a09g047-tsu.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Renesas RZ/G3E Temperature Sensor Unit (TSU)
+
+maintainers:
+ - John Madieu <john.madieu.xa@bp.renesas.com>
+
+description:
+ The Temperature Sensor Unit (TSU) is an integrated thermal sensor that
+ monitors the chip temperature on the Renesas RZ/G3E SoC. The TSU provides
+ real-time temperature measurements for thermal management.
+
+properties:
+ compatible:
+ const: renesas,r9a09g047-tsu
+
+ reg:
+ maxItems: 1
+
+ clocks:
+ maxItems: 1
+
+ resets:
+ maxItems: 1
+
+ power-domains:
+ maxItems: 1
+
+ interrupts:
+ items:
+ - description: Conversion complete interrupt signal (pulse)
+ - description: Comparison result interrupt signal (level)
+
+ interrupt-names:
+ items:
+ - const: adi
+ - const: adcmpi
+
+ "#thermal-sensor-cells":
+ const: 0
+
+ renesas,tsu-trim:
+ $ref: /schemas/types.yaml#/definitions/phandle-array
+ items:
+ - items:
+ - description: phandle to system controller
+ - description: offset of trim registers
+ description:
+ Phandle and offset to the system controller containing the TSU
+ calibration trim values. The offset points to the first trim register
+ (OTPTSU1TRMVAL0), with the second trim register (OTPTSU1TRMVAL1) located
+ at offset + 4.
+
+required:
+ - compatible
+ - reg
+ - clocks
+ - resets
+ - power-domains
+ - interrupts
+ - interrupt-names
+ - "#thermal-sensor-cells"
+ - renesas,tsu-trim
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/renesas,r9a09g047-cpg.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+
+ thermal-sensor@14002000 {
+ compatible = "renesas,r9a09g047-tsu";
+ reg = <0x14002000 0x1000>;
+ clocks = <&cpg CPG_MOD 0x10a>;
+ resets = <&cpg 0xf8>;
+ power-domains = <&cpg>;
+ interrupts = <GIC_SPI 250 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 251 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "adi", "adcmpi";
+ #thermal-sensor-cells = <0>;
+ renesas,tsu-trim = <&sys 0x330>;
+ };
--
2.25.1
next prev parent reply other threads:[~2025-09-17 17:02 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-09-17 17:01 [PATCH v9 0/4] thermal: renesas: Add support for RZ/G3E John Madieu
2025-09-17 17:01 ` John Madieu [this message]
2025-09-17 17:01 ` [PATCH v9 2/4] thermal: renesas: rzg3e: Add thermal driver for the Renesas RZ/G3E SoC John Madieu
2025-09-19 17:06 ` Biju Das
2025-09-17 17:01 ` [PATCH v9 3/4] arm64: dts: renesas: r9a09g047: Add TSU node John Madieu
2025-09-24 14:07 ` Geert Uytterhoeven
2025-09-29 11:34 ` Geert Uytterhoeven
2025-09-17 17:01 ` [PATCH v9 4/4] arm64: defconfig: Enable the Renesas RZ/G3E thermal driver John Madieu
2025-09-29 11:36 ` Geert Uytterhoeven
2025-09-19 16:37 ` [PATCH v9 0/4] thermal: renesas: Add support for RZ/G3E Daniel Lezcano
2025-09-19 16:55 ` John Madieu
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