From: Chwee-Lin Choong <chwee.lin.choong@intel.com>
To: Tony Nguyen <anthony.l.nguyen@intel.com>,
Przemek Kitszel <przemyslaw.kitszel@intel.com>,
Andrew Lunn <andrew+netdev@lunn.ch>,
"David S . Miller" <davem@davemloft.net>,
Eric Dumazet <edumazet@google.com>,
Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>,
Richard Cochran <richardcochran@gmail.com>,
Vinicius Costa Gomes <vinicius.gomes@intel.com>
Cc: intel-wired-lan@lists.osuosl.org, netdev@vger.kernel.org,
linux-kernel@vger.kernel.org, Avi Shalev <avi.shalev@intel.com>,
Song Yoong Siang <yoong.siang.song@intel.com>
Subject: [PATCH iwl-net v1] igc: fix race condition in TX timestamp read for register 0
Date: Fri, 19 Sep 2025 02:38:11 +0800 [thread overview]
Message-ID: <20250918183811.31270-1-chwee.lin.choong@intel.com> (raw)
The current HW bug workaround checks the TXTT_0 ready bit first,
then reads LOW -> HIGH -> LOW from register 0 to detect if a
timestamp was captured.
This sequence has a race: if a new timestamp is latched after
reading the TXTT mask but before the first LOW read, both old
and new timestamp match, causing the driver to drop a valid
timestamp.
Fix by reading the LOW register first, then the TXTT mask,
so a newly latched timestamp will always be detected.
This fix also prevents TX unit hangs observed under heavy
timestamping load.
Fixes: c789ad7cbebc ("igc: Work around HW bug causing missing timestamps")
Suggested-by: Avi Shalev <avi.shalev@intel.com>
Signed-off-by: Song Yoong Siang <yoong.siang.song@intel.com>
Signed-off-by: Chwee-Lin Choong <chwee.lin.choong@intel.com>
---
drivers/net/ethernet/intel/igc/igc_ptp.c | 10 ++++++++--
1 file changed, 8 insertions(+), 2 deletions(-)
diff --git a/drivers/net/ethernet/intel/igc/igc_ptp.c b/drivers/net/ethernet/intel/igc/igc_ptp.c
index b7b46d863bee..930486b02fc1 100644
--- a/drivers/net/ethernet/intel/igc/igc_ptp.c
+++ b/drivers/net/ethernet/intel/igc/igc_ptp.c
@@ -774,10 +774,17 @@ static void igc_ptp_tx_reg_to_stamp(struct igc_adapter *adapter,
static void igc_ptp_tx_hwtstamp(struct igc_adapter *adapter)
{
struct igc_hw *hw = &adapter->hw;
+ u32 txstmpl_old;
u64 regval;
u32 mask;
int i;
+ /* Read the "low" register 0 first to establish a baseline value.
+ * This avoids a race where a new timestamp could be latched
+ * after checking the TXTT mask.
+ */
+ txstmpl_old = rd32(IGC_TXSTMPL);
+
mask = rd32(IGC_TSYNCTXCTL) & IGC_TSYNCTXCTL_TXTT_ANY;
if (mask & IGC_TSYNCTXCTL_TXTT_0) {
regval = rd32(IGC_TXSTMPL);
@@ -801,9 +808,8 @@ static void igc_ptp_tx_hwtstamp(struct igc_adapter *adapter)
* timestamp was captured, we can read the "high"
* register again.
*/
- u32 txstmpl_old, txstmpl_new;
+ u32 txstmpl_new;
- txstmpl_old = rd32(IGC_TXSTMPL);
rd32(IGC_TXSTMPH);
txstmpl_new = rd32(IGC_TXSTMPL);
--
2.42.0
next reply other threads:[~2025-09-18 10:59 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-09-18 18:38 Chwee-Lin Choong [this message]
2025-09-18 16:03 ` [Intel-wired-lan] " Paul Menzel
2025-09-19 6:16 ` Choong, Chwee Lin
2025-09-18 20:47 ` Vadim Fedorenko
2025-09-18 22:10 ` [Intel-wired-lan] " Jacob Keller
2025-09-19 7:17 ` Choong, Chwee Lin
2025-09-19 10:55 ` Vadim Fedorenko
2025-09-19 12:57 ` Shalev, Avi
2025-09-19 10:52 ` Vadim Fedorenko
2025-09-19 19:34 ` Loktionov, Aleksandr
2025-10-13 14:04 ` Bouska, Zdenek
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