From: Conor Dooley <conor@kernel.org>
To: Junhui Liu <junhui.liu@pigmoral.tech>
Cc: Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Philipp Zabel <p.zabel@pengutronix.de>,
Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Alexandre Ghiti <alex@ghiti.fr>,
linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org,
devicetree@vger.kernel.org, linux-riscv@lists.infradead.org,
"fushan.zeng" <fushan.zeng@anlogic.com>
Subject: Re: [PATCH 2/5] dt-bindings: clock: add Anlogic DR1V90 CRU
Date: Tue, 23 Sep 2025 20:02:38 +0100 [thread overview]
Message-ID: <20250923-cork-clarity-40358e06d361@spud> (raw)
In-Reply-To: <20250922-dr1v90-cru-v1-2-e393d758de4e@pigmoral.tech>
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Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
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next prev parent reply other threads:[~2025-09-23 19:02 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-09-22 14:51 [PATCH 0/5] clk/reset: anlogic: add support for DR1V90 SoC Junhui Liu
2025-09-22 14:51 ` [PATCH 1/5] clk: correct clk_div_mask() return value for width == 32 Junhui Liu
2025-09-23 3:06 ` Troy Mitchell
2025-09-22 14:51 ` [PATCH 2/5] dt-bindings: clock: add Anlogic DR1V90 CRU Junhui Liu
2025-09-23 19:02 ` Conor Dooley [this message]
2025-09-22 14:51 ` [PATCH 3/5] clk: anlogic: add cru support for Anlogic DR1V90 SoC Junhui Liu
2025-09-22 14:51 ` [PATCH 4/5] reset: anlogic: add support for Anlogic DR1V90 resets Junhui Liu
2025-09-22 14:51 ` [PATCH 5/5] riscv: dts: anlogic: add clocks and CRU for DR1V90 Junhui Liu
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