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[129.46.96.20]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-78102b274dasm234024b3a.63.2025.09.24.17.05.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 24 Sep 2025 17:05:44 -0700 (PDT) From: Jingyi Wang Date: Wed, 24 Sep 2025 17:05:35 -0700 Subject: [PATCH 2/2] arm64: defconfig: Enable Kaanapali clock controllers Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20250924-knp-config-v1-2-e2cf83b1932e@oss.qualcomm.com> References: <20250924-knp-config-v1-0-e2cf83b1932e@oss.qualcomm.com> In-Reply-To: <20250924-knp-config-v1-0-e2cf83b1932e@oss.qualcomm.com> To: linux-kernel@vger.kernel.org, aiqun.yu@oss.qualcomm.com, tingwei.zhang@oss.qualcomm.com, trilok.soni@oss.qualcomm.com, yijie.yang@oss.qualcomm.com, Jingyi Wang Cc: Taniya Das X-Mailer: b4 0.15-dev-99b12 X-Developer-Signature: v=1; a=ed25519-sha256; t=1758758742; l=951; i=jingyi.wang@oss.qualcomm.com; s=20250911; h=from:subject:message-id; bh=aMBeijjGEEeoppP3enr2dOKjxXvOU7V2ItVTYcRLl2A=; b=/jaK34zdECdzfN39/ZVS5rUCbCTTxHpoUJWhJDE7hJAWVQ0t14Cz7ded2YIjCnZtKmn0rWD7K 1uVJkXjm898A96uXJlEA6AIM+/otRFJAWoLPey6UiKOvnFzS+2lXvLT X-Developer-Key: i=jingyi.wang@oss.qualcomm.com; a=ed25519; pk=PSoHZ6KbUss3IW8FPRVMHMK0Jkkr/jV347mBYJO3iLo= X-Proofpoint-ORIG-GUID: mEAB3qa8009-Y_ISoO_v9p-dVt_QgW9a X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwOTIzMDAxMSBTYWx0ZWRfX47JW++9HDy00 7AWMTQUFwbE7aX83JJRxyPYf2w9okOcOeztCu3/UCZXMaxVh3bVybE+AED610qEB1ppMSHyRvBO 32zlAipudj6YdDSxZ28yTrtOfsfpTpfTXzQaTeGDsbGqvyCp6U8XYX8HAVBKWGkkAikLeuITt4E lLYAe1Gh4MbSUUVzk4t/DpX1/dygBqHUrYQm6AwYZa5/nD8+CZOmnBnl4fY4DWIrwhd4APXBcy0 DWLbye1GIB9MjyuO3J4JwDpswucenJWCAxlYWriWNUuGpP6/C8RmJ8RhIAwetRmoz2rzQfR/xpg O4UymtGiDPYL0mL6rA41UzByftEK1UdbEUTHwk47lKhkPuQir4//AurHMI257yVv9XiKRldWOxK ELzZvFVH X-Proofpoint-GUID: mEAB3qa8009-Y_ISoO_v9p-dVt_QgW9a X-Authority-Analysis: v=2.4 cv=Csq/cm4D c=1 sm=1 tr=0 ts=68d4875a cx=c_pps a=mDZGXZTwRPZaeRUbqKGCBw==:117 a=ouPCqIW2jiPt+lZRy3xVPw==:17 a=IkcTkHD0fZMA:10 a=yJojWOMRYYMA:10 a=EUspDBNiAAAA:8 a=VnGTKYAKMpk4jy3Q42AA:9 a=QEXdDO2ut3YA:10 a=zc0IvFSfCIW2DFIPzwfm:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1117,Hydra:6.1.9,FMLib:17.12.80.40 definitions=2025-09-24_07,2025-09-24_01,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 bulkscore=0 adultscore=0 impostorscore=0 phishscore=0 clxscore=1015 spamscore=0 priorityscore=1501 malwarescore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2507300000 definitions=main-2509230011 From: Taniya Das Enable the Kaanapali display, video, camera and gpu clock controller for their respective functionalities on the Qualcomm Kaanapali platform. Signed-off-by: Taniya Das Signed-off-by: Jingyi Wang --- arch/arm64/configs/defconfig | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index a3767e2ce02d..e67e8ad323de 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -1364,7 +1364,11 @@ CONFIG_COMMON_CLK_MT8192_SCP_ADSP=y CONFIG_COMMON_CLK_MT8192_VDECSYS=y CONFIG_COMMON_CLK_MT8192_VENCSYS=y CONFIG_COMMON_CLK_QCOM=y +CONFIG_CLK_KAANAPALI_CAMCC=y +CONFIG_CLK_KAANAPALI_DISPCC=y CONFIG_CLK_KAANAPALI_GCC=y +CONFIG_CLK_KAANAPALI_GPUCC=y +CONFIG_CLK_KAANAPALI_VIDEOCC=y CONFIG_CLK_X1E80100_CAMCC=m CONFIG_CLK_X1E80100_DISPCC=m CONFIG_CLK_X1E80100_GCC=y -- 2.25.1