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Wed, 24 Sep 2025 05:55:57 -0700 (PDT) Received: from ziepe.ca ([130.41.10.202]) by smtp.gmail.com with ESMTPSA id 46e09a7af769-7692af2f9desm7576308a34.31.2025.09.24.05.55.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 24 Sep 2025 05:55:57 -0700 (PDT) Received: from jgg by wakko with local (Exim 4.97) (envelope-from ) id 1v1P2J-0000000B800-3i6s; Wed, 24 Sep 2025 09:55:55 -0300 Date: Wed, 24 Sep 2025 09:55:55 -0300 From: Jason Gunthorpe To: Manivannan Sadhasivam Cc: Manivannan Sadhasivam , Bjorn Helgaas , Joerg Roedel , Will Deacon , Robin Murphy , Greg Kroah-Hartman , linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, Joerg Roedel , iommu@lists.linux.dev, Anders Roxell , Naresh Kamboju , Pavankumar Kondeti , Xingang Wang , Marek Szyprowski , stable@vger.kernel.org Subject: Re: [PATCH 0/2] PCI: Fix ACS enablement for Root Ports in DT platforms Message-ID: <20250924125555.GJ2547959@ziepe.ca> References: <20250910-pci-acs-v1-0-fe9adb65ad7d@oss.qualcomm.com> <20250918141102.GO1326709@ziepe.ca> <20250923162139.GC2547959@ziepe.ca> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: On Wed, Sep 24, 2025 at 01:51:23PM +0530, Manivannan Sadhasivam wrote: > This device is not spec conformant in many areas tbh. But my > suggestion would be to follow the vendor suggested erratum until any > reported issues. I mean the ethernet chip retaining it's SBR after a FLR or link up/down is probably not a spec requirement.. Jason