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[129.46.96.20]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-33471d711ecsm499881a91.4.2025.09.24.19.29.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 24 Sep 2025 19:29:06 -0700 (PDT) From: Wesley Cheng To: krzk+dt@kernel.org, conor+dt@kernel.org, dmitry.baryshkov@oss.qualcomm.com, kishon@kernel.org, vkoul@kernel.org, gregkh@linuxfoundation.org, robh@kernel.org Cc: linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-usb@vger.kernel.org, linux-kernel@vger.kernel.org, Wesley Cheng Subject: [PATCH v3 09/10] phy: qualcomm: m31-eusb2: Make clkref an optional resource Date: Wed, 24 Sep 2025 19:28:49 -0700 Message-Id: <20250925022850.4133013-10-wesley.cheng@oss.qualcomm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250925022850.4133013-1-wesley.cheng@oss.qualcomm.com> References: <20250925022850.4133013-1-wesley.cheng@oss.qualcomm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Proofpoint-GUID: 5jCpa4HNd-JuJJ5NvxHqxEKfdvV_f6ao X-Authority-Analysis: v=2.4 cv=RO2zH5i+ c=1 sm=1 tr=0 ts=68d4a8f5 cx=c_pps a=IZJwPbhc+fLeJZngyXXI0A==:117 a=ouPCqIW2jiPt+lZRy3xVPw==:17 a=yJojWOMRYYMA:10 a=EUspDBNiAAAA:8 a=8inbgvmG2iPteTk8MkMA:9 a=uG9DUKGECoFWVXl0Dc02:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwOTIwMDAyNSBTYWx0ZWRfXw8JlylAB4ach UPh3bjUs9G/NrsEwYY5dfvaeE0cjXl73dbKJoPnPFgqzz7hwNUno0L4myz0bEvTjpwDgFJmTQNJ 0vIyK0YRmCGfhw+HO4lGLfB02vYqYvMVXRdDLAiL1MYOdkl3EXFfP8fretapBtlFTLMW7K5+scu Ki+KAzYMah6S9xCj+eQPCnxpwMpbgDQFTKQhr0FfM8D5xlnk4I6O6ulQvC8Fs/ykEiAn6h7SRJO xpCiIF09dLWyitLGl3zyh3v2gd7ZDlK5/s2NT/mupLvZbSse+9EyMBP9cVHioGNzhKM5kQRuzLY r5nv+2PygVr5m/GbvN5XoYnC37UHzm5dryugkshSlcTvhxiaNUH516VCprQGgMCJBxvx42bA8IC 1yx8VYmn X-Proofpoint-ORIG-GUID: 5jCpa4HNd-JuJJ5NvxHqxEKfdvV_f6ao X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1117,Hydra:6.1.9,FMLib:17.12.80.40 definitions=2025-09-24_07,2025-09-24_01,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 clxscore=1015 suspectscore=0 priorityscore=1501 impostorscore=0 spamscore=0 adultscore=0 bulkscore=0 phishscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2507300000 definitions=main-2509200025 Some USB subsystems that utlize the M31 eUSB2 PHY doesn't require a clkref. One example is the Glymur platform, which contains 4 USB controllers that all utilize the M31 eUSB2 PHY. However, PHYs associated to the primary and secondary controllers do not require a clkref resource. Due to this, mark this as an optional clock. Reviewed-by: Dmitry Baryshkov Signed-off-by: Wesley Cheng --- drivers/phy/qualcomm/phy-qcom-m31-eusb2.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/phy/qualcomm/phy-qcom-m31-eusb2.c b/drivers/phy/qualcomm/phy-qcom-m31-eusb2.c index 95cd3175926d..f8a00962f937 100644 --- a/drivers/phy/qualcomm/phy-qcom-m31-eusb2.c +++ b/drivers/phy/qualcomm/phy-qcom-m31-eusb2.c @@ -267,7 +267,7 @@ static int m31eusb2_phy_probe(struct platform_device *pdev) if (IS_ERR(phy->reset)) return PTR_ERR(phy->reset); - phy->clk = devm_clk_get(dev, NULL); + phy->clk = devm_clk_get_optional(dev, NULL); if (IS_ERR(phy->clk)) return dev_err_probe(dev, PTR_ERR(phy->clk), "failed to get clk\n");