Re: [PATCH v2 6/8] iio: adc: ad4030: Add SPI offload support

[kernel test robot <lkp@intel.com>]

Hi Marcelo,

kernel test robot noticed the following build errors:

[auto build test ERROR on 561285d048053fec8a3d6d1e3ddc60df11c393a0]

url:    https://github.com/intel-lab-lkp/linux/commits/Marcelo-Schmitt/iio-adc-ad4030-Fix-_scale-value-for-common-mode-channels/20250919-014323
base:   561285d048053fec8a3d6d1e3ddc60df11c393a0
patch link:    https://lore.kernel.org/r/da55c0ed6fe895dc84e79c8b64e5923a4851e58f.1758214628.git.marcelo.schmitt%40analog.com
patch subject: [PATCH v2 6/8] iio: adc: ad4030: Add SPI offload support
config: x86_64-randconfig-077-20250922 (https://download.01.org/0day-ci/archive/20250925/202509250425.p1Sm9XA1-lkp@intel.com/config)
compiler: clang version 20.1.8 (https://github.com/llvm/llvm-project 87f0227cb60147a26a1eeb4fb06e3b505e9c7261)
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20250925/202509250425.p1Sm9XA1-lkp@intel.com/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202509250425.p1Sm9XA1-lkp@intel.com/

All errors (new ones prefixed by >>):

>> drivers/iio/adc/ad4030.c:561:20: error: no member named 'offset_ns' in 'struct spi_offload_trigger_periodic'
     561 |                 config->periodic.offset_ns = offload_offset_ns;
         |                 ~~~~~~~~~~~~~~~~ ^
   drivers/iio/adc/ad4030.c:566:28: error: no member named 'offset_ns' in 'struct spi_offload_trigger_periodic'
     566 |         } while (config->periodic.offset_ns < AD4030_TQUIET_CNV_DELAY_NS);
         |                  ~~~~~~~~~~~~~~~~ ^
   2 errors generated.


vim +561 drivers/iio/adc/ad4030.c

   502	
   503	static int __ad4030_set_sampling_freq(struct ad4030_state *st,
   504					      unsigned int freq, unsigned int avg_log2)
   505	{
   506		struct spi_offload_trigger_config *config = &st->offload_trigger_config;
   507		struct pwm_waveform cnv_wf = { };
   508		u64 target = AD4030_TCNVH_NS;
   509		u64 offload_period_ns;
   510		u64 offload_offset_ns;
   511		int ret;
   512	
   513		/*
   514		 * When averaging/oversampling over N samples, we fire the offload
   515		 * trigger once at every N pulses of the CNV signal. Conversely, the CNV
   516		 * signal needs to be N times faster than the offload trigger. Take that
   517		 * into account to correctly re-evaluate both the PWM waveform connected
   518		 * to CNV and the SPI offload trigger.
   519		 */
   520		if (st->mode == AD4030_OUT_DATA_MD_30_AVERAGED_DIFF)
   521			freq <<= avg_log2;
   522	
   523		cnv_wf.period_length_ns = DIV_ROUND_CLOSEST(NSEC_PER_SEC, freq);
   524		/*
   525		 * The datasheet lists a minimum time of 9.8 ns, but no maximum. If the
   526		 * rounded PWM's value is less than 10, increase the target value by 10
   527		 * and attempt to round the waveform again, until the value is at least
   528		 * 10 ns. Use a separate variable to represent the target in case the
   529		 * rounding is severe enough to keep putting the first few results under
   530		 * the minimum 10ns condition checked by the while loop.
   531		 */
   532		do {
   533			cnv_wf.duty_length_ns = target;
   534			ret = pwm_round_waveform_might_sleep(st->cnv_trigger, &cnv_wf);
   535			if (ret)
   536				return ret;
   537			target += AD4030_TCNVH_NS;
   538		} while (cnv_wf.duty_length_ns < AD4030_TCNVH_NS);
   539	
   540		if (!in_range(cnv_wf.period_length_ns, AD4030_TCYC_NS, INT_MAX))
   541			return -EINVAL;
   542	
   543		offload_period_ns = cnv_wf.period_length_ns;
   544		if (st->mode == AD4030_OUT_DATA_MD_30_AVERAGED_DIFF)
   545			offload_period_ns <<= avg_log2;
   546	
   547		config->periodic.frequency_hz =  DIV_ROUND_UP_ULL(NSEC_PER_SEC,
   548								  offload_period_ns);
   549	
   550		/*
   551		 * The hardware does the capture on zone 2 (when SPI trigger PWM
   552		 * is used). This means that the SPI trigger signal should happen at
   553		 * tsync + tquiet_con_delay being tsync the conversion signal period
   554		 * and tquiet_con_delay 9.8ns. Hence set the PWM phase accordingly.
   555		 *
   556		 * The PWM waveform API only supports nanosecond resolution right now,
   557		 * so round this setting to the closest available value.
   558		 */
   559		offload_offset_ns = AD4030_TQUIET_CNV_DELAY_NS;
   560		do {
 > 561			config->periodic.offset_ns = offload_offset_ns;
   562			ret = spi_offload_trigger_validate(st->offload_trigger, config);
   563			if (ret)
   564				return ret;
   565			offload_offset_ns += AD4030_TQUIET_CNV_DELAY_NS;
   566		} while (config->periodic.offset_ns < AD4030_TQUIET_CNV_DELAY_NS);
   567	
   568		st->cnv_wf = cnv_wf;
   569	
   570		return 0;
   571	}
   572	

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