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From: Xu Yilun <yilun.xu@linux.intel.com>
To: linux-coco@lists.linux.dev, linux-pci@vger.kernel.org,
	dan.j.williams@intel.com
Cc: yilun.xu@intel.com, yilun.xu@linux.intel.com,
	baolu.lu@linux.intel.com, zhenzhong.duan@intel.com,
	aneesh.kumar@kernel.org, bhelgaas@google.com, aik@amd.com,
	linux-kernel@vger.kernel.org
Subject: [PATCH 3/3] coco/tdx-host: Illustrate IDE Address Association Register setup
Date: Sun, 28 Sep 2025 14:27:56 +0800	[thread overview]
Message-ID: <20250928062756.2188329-4-yilun.xu@linux.intel.com> (raw)
In-Reply-To: <20250928062756.2188329-1-yilun.xu@linux.intel.com>

Not for devsec-staging. Just illustrate, can't compile. Please wait for:

  [RFC PATCH v2 00/27] PCI/TSM: TDX Connect: SPDM Session and IDE Establishment

Signed-off-by: Xu Yilun <yilun.xu@linux.intel.com>
---
 drivers/virt/coco/tdx-host/tdx-host.c | 33 ++++-----------------------
 1 file changed, 4 insertions(+), 29 deletions(-)

diff --git a/drivers/virt/coco/tdx-host/tdx-host.c b/drivers/virt/coco/tdx-host/tdx-host.c
index 5553c63b4083..58777225b51e 100644
--- a/drivers/virt/coco/tdx-host/tdx-host.c
+++ b/drivers/virt/coco/tdx-host/tdx-host.c
@@ -387,29 +387,6 @@ static void tdx_ide_stream_key_stop(struct tdx_link *tlink)
 
 DEFINE_FREE(tdx_ide_stream_key_stop, struct tdx_link *, if (!IS_ERR_OR_NULL(_T)) tdx_ide_stream_key_stop(_T))
 
-/* OPEN: Should we add general address range support in pci/ide.c ? */
-static void setup_addr_range(struct pci_dev *pdev,
-			     resource_size_t *start, resource_size_t *end)
-{
-	struct device *dev;
-	u32 devid;
-	int i;
-
-	add_pdev_to_addr_range(pdev, start, end);
-
-	for (i = 0; i < pci_num_vf(pdev); i++) {
-		devid = PCI_DEVID(pci_iov_virtfn_bus(pdev, i),
-				  pci_iov_virtfn_devfn(pdev, i));
-
-		dev = bus_find_device(&pci_bus_type, NULL, &devid,
-				      match_pci_dev_by_devid);
-		if (dev) {
-			add_pdev_to_addr_range(to_pci_dev(dev), start, end);
-			put_device(dev);
-		}
-	}
-}
-
 static void sel_stream_block_setup(struct pci_dev *pdev, struct pci_ide *ide,
 				   u64 *rid_assoc1, u64 *rid_assoc2,
 				   u64 *addr_assoc1, u64 *addr_assoc2,
@@ -422,12 +399,10 @@ static void sel_stream_block_setup(struct pci_dev *pdev, struct pci_ide *ide,
 	*rid_assoc1 = FIELD_PREP(PCI_IDE_SEL_RID_1_LIMIT, setting->rid_end);
 	*rid_assoc2 = PREP_PCI_IDE_SEL_RID_2(setting->rid_start, pci_ide_domain(pdev));
 
-	/* Only one address association register block */
-	setup_addr_range(pdev, &start, &end);
-
-	*addr_assoc1 = PREP_PCI_IDE_SEL_ADDR1(start, end);
-	*addr_assoc2 = FIELD_GET(SEL_ADDR_UPPER, end);
-	*addr_assoc3 = FIELD_GET(SEL_ADDR_UPPER, start);
+	/* TDX Module enforces only one address association register block */
+	*addr_assoc1 = PREP_PCI_IDE_SEL_ADDR1(setting->mem64.start, setting->mem64.end);
+	*addr_assoc2 = FIELD_GET(SEL_ADDR_UPPER, setting->mem64.end);
+	*addr_assoc3 = FIELD_GET(SEL_ADDR_UPPER, setting->mem64.start);
 }
 
 #define STREAM_INFO_RP_DEVFN		GENMASK_ULL(7, 0)
-- 
2.25.1


      parent reply	other threads:[~2025-09-28  6:40 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-09-28  6:27 [PATCH 0/3] Address Association Register setup for RP Xu Yilun
2025-09-28  6:27 ` [PATCH 1/3] PCI/IDE: Add/export mini helpers for platform TSM drivers Xu Yilun
2025-10-01  0:24   ` dan.j.williams
2025-10-03  1:59     ` Xu Yilun
2025-10-03  2:26       ` dan.j.williams
2025-09-28  6:27 ` [PATCH 2/3] PCI/IDE: Add Address Association Register setup for RP Xu Yilun
2025-09-30 12:29   ` Ilpo Järvinen
2025-10-01  0:52     ` dan.j.williams
2025-10-01 10:55       ` Ilpo Järvinen
2025-10-01 19:58         ` dan.j.williams
2025-10-01 20:20   ` dan.j.williams
2025-10-02 13:30     ` Ilpo Järvinen
2025-10-02 15:58       ` dan.j.williams
2025-10-03  5:42     ` Xu Yilun
2025-10-03 18:18       ` dan.j.williams
2025-10-06  3:05         ` Xu Yilun
2025-09-28  6:27 ` Xu Yilun [this message]

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