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From: Davidlohr Bueso <dave@stgolabs.net>
To: Li Ming <ming.li@zohomail.com>
Cc: jonathan.cameron@huawei.com, dave.jiang@intel.com,
	alison.schofield@intel.com, vishal.l.verma@intel.com,
	ira.weiny@intel.com, dan.j.williams@intel.com,
	shiju.jose@huawei.com, linux-cxl@vger.kernel.org,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 1/1] cxl/port: Avoid missing port component registers setup
Date: Mon, 29 Sep 2025 17:50:53 -0700	[thread overview]
Message-ID: <20250930005053.2jme7stunhrmp3om@offworld> (raw)
In-Reply-To: <20250928101433.424778-1-ming.li@zohomail.com>

On Sun, 28 Sep 2025, Li Ming wrote:

>port->nr_dports is used to represent how many dports added to the cxl
>port, it will increase in add_dport() when a new dport is being added to
>the cxl port, but it will not be reduced when a dport is removed from
>the cxl port.
>
>Currently, when the first dport is added to a cxl port, it will trigger
>component registers setup on the cxl port, the implementation is using
>port->nr_dports to confirm if the dport is the first dport.
>
>A corner case here is that adding dport could fail after port->nr_dports
>updating and before checking port->nr_dports for component registers
>setup. If the failure happens during the first dport attaching, it will
>cause that CXL subsystem has not chance to execute component registers
>setup for the cxl port. the failure flow like below:
>
>port->nr_dports = 0
>dport 1 adding to the port:
>	add_dport()	# port->nr_dports: 1
>	failed on devm_add_action_or_reset() or sysfs_create_link()
>	return error	# port->nr_dports: 1
>dport 2 adding to the port:
>	add_dport()	# port->nr_dports: 2
>	no failure
>	skip component registers setup because of port->nr_dports is 2
>
>The solution here is that moving component registers setup closer to
>add_dport(), so if add_dport() is executed correctly for the first
>dport, component registers setup on the port will be executed
>immediately after that.

Reviewed-by: Davidlohr Bueso <dave@stgolabs.net>

      parent reply	other threads:[~2025-09-30  1:46 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-09-28 10:14 Li Ming
2025-09-29 16:53 ` Dave Jiang
2025-09-30  0:46   ` Li Ming
2025-09-30  0:50 ` Davidlohr Bueso [this message]

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