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Miller" CC: T Pratham , , , Manorit Chawdhry , Kamlesh Gurudasani , Shiva Tripathi , Kavitha Malarvizhi , Vishal Mahaveer , Praneeth Bajjuri Subject: [PATCH v4 0/4] Add support for more AES modes in TI DTHEv2 Date: Thu, 9 Oct 2025 16:11:30 +0530 Message-ID: <20251009111727.911738-1-t-pratham@ti.com> X-Mailer: git-send-email 2.43.0 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-C2ProcessedOrg: 333ef613-75bf-4e12-a4b1-8e3623f5dcea DTHEv2 is a new cryptography engine introduced in TI AM62L SoC. The features of DTHEv2 and details of AES modes supported were detailed in [1]. Additional hardware details available in SoC TRM [2]. This patch series adds support for the following AES modes: - AES-XTS - AES-CTR - AES-GCM - AES-CCM The driver is tested using full kernel crypto selftests (CRYPTO_SELFTESTS_FULL) which all pass successfully [3]. PS: The patches 3/4 and 4/4 in this series (AES-GCM and AES-CCM) depend on the following fix: https://lore.kernel.org/all/20251008100117.808195-1-t-pratham@ti.com/ Signed-off-by: T Pratham --- [1]: [PATCH v7 0/2] Add support for Texas Instruments DTHEv2 Crypto Engine Link: https://lore.kernel.org/all/20250820092710.3510788-1-t-pratham@ti.com/ [2]: Section 14.6.3 (DMA Control Registers -> DMASS_DTHE) Link: https://www.ti.com/lit/ug/sprujb4/sprujb4.pdf [3]: DTHEv2 AES Engine kernel self-tests logs Link: https://gist.github.com/Pratham-T/aaa499cf50d20310cb27266a645bfd60 Change log: v4: - Return -EINVAL in AES-XTS when cryptlen = 0 - Added software fallback for AES-XTS when ciphertext stealing is required (cryptlen is not multiple of AES_BLOCK_SIZE) - Changed DTHE_MAX_KEYSIZE definition to use AES_MAX_KEY_SIZE instead of AES_KEYSIZE_256 - In AES-CTR, also pad dst scatterlist when padding src scatterlist - Changed polling for TAG ready to use readl_relaxed_poll_timeout() - Used crypto API functions to access struct members instead of directly accessing them (crypto_aead_tfm and aead_request_flags) - Allocated padding buffers in AEAD algos on the stack. - Changed helper functions dthe_aead_prep_* to return ERR_PTR on error - Changed some error labels in dthe_aead_run to improve clarity - Moved iv_in[] declaration from middle of the function to the top - Corrected setting CCM M value in the hardware register - Added checks for CCM L value input in the algorithm from IV. - Added more fallback cases for CCM where hardware has limitations v3: - Added header files to remove implicit declaration error. - Corrected assignment of src_nents and dst_nents in dthe_aead_run (Ran the lkp kernel test bot script locally to ensure no more such errors are present) v2: - Corrected assignment of variable unpadded_cryptlen in dthe_aead_run. - Removed some if conditions which are always false, and documented the cases in comments. - Moved polling of TAG ready register to a separate function and returning -ETIMEDOUT on poll timeout. - Corrected comments to adhere to kernel coding guidelines. Link to previous version: v3: https://lore.kernel.org/all/20250910100742.3747614-1-t-pratham@ti.com/ v2: https://lore.kernel.org/all/20250908140928.2801062-1-t-pratham@ti.com/ v1: https://lore.kernel.org/all/20250905133504.2348972-4-t-pratham@ti.com/ --- T Pratham (4): crypto: ti - Add support for AES-XTS in DTHEv2 driver crypto: ti - Add support for AES-CTR in DTHEv2 driver crypto: ti - Add support for AES-GCM in DTHEv2 driver crypto: ti - Add support for AES-CCM in DTHEv2 driver drivers/crypto/ti/Kconfig | 5 + drivers/crypto/ti/dthev2-aes.c | 929 +++++++++++++++++++++++++++++- drivers/crypto/ti/dthev2-common.c | 19 + drivers/crypto/ti/dthev2-common.h | 39 +- 4 files changed, 975 insertions(+), 17 deletions(-) -- 2.43.0