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([188.163.112.70]) by smtp.gmail.com with ESMTPSA id 38308e7fff4ca-3762ea14d46sm53226121fa.34.2025.10.16.00.42.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 16 Oct 2025 00:42:20 -0700 (PDT) From: Svyatoslav Ryhel To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Thierry Reding , Thierry Reding , Jonathan Hunter , Svyatoslav Ryhel Cc: devicetree@vger.kernel.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v5 0/4 RESEND] ARM: tegra: complete Tegra 4 and Tegra K1 device trees Date: Thu, 16 Oct 2025 10:41:48 +0300 Message-ID: <20251016074152.8759-1-clamor95@gmail.com> X-Mailer: git-send-email 2.48.1 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Complete T114 and T124 device trees. --- Changes in v5: - dropped clock and reset names from TSEC schema - removed clock and reset names from device nodes Changes in v4: - configured tsec schema to cover Tegra210 TSEC as well - added required to tsec schema - reset-names preserved for consistency with other host1x devices and align with T210 - added clock-names to align with T210 - operating-points-v2 check https://lore.kernel.org/lkml/20230119131033.117324-1-krzysztof.kozlowski@linaro.org/ Changes in v3: - added tsec description - swapped compatible back to use enum - clock and reset description dropped, added maxItems: 1 - reset-names preserved for consistency with other host1x devices - dropped interconnects and interconnect-names - dropped isp nodename - dropped multiple rest names for mpe/msenc - dropped tegra114 msenc example - fixed reset name in second isp in t124 dtsi Changes in v2: - dropped accepted commits - added EPP, MPE and ISP compatibility for T114 and T124 - added TSEC schema --- Svyatoslav Ryhel (4): dt-bindings: display: tegra: document EPP, ISP, MPE and TSEC for Tegra114+ ARM: tegra114: add missing HOST1X device nodes ARM: tegra124: add missing HOST1X device nodes arm64: tegra210: drop redundant clock and reset names from TSEC node .../display/tegra/nvidia,tegra114-tsec.yaml | 68 +++++++++++++++++++ .../display/tegra/nvidia,tegra20-epp.yaml | 14 ++-- .../display/tegra/nvidia,tegra20-isp.yaml | 15 ++-- .../display/tegra/nvidia,tegra20-mpe.yaml | 18 +++-- arch/arm/boot/dts/nvidia/tegra114.dtsi | 64 +++++++++++++++++ arch/arm/boot/dts/nvidia/tegra124.dtsi | 64 +++++++++++++++++ arch/arm64/boot/dts/nvidia/tegra210.dtsi | 2 - 7 files changed, 230 insertions(+), 15 deletions(-) create mode 100644 Documentation/devicetree/bindings/display/tegra/nvidia,tegra114-tsec.yaml -- 2.48.1