From: Borislav Petkov <bp@alien8.de>
To: "Ahmed S. Darwish" <darwi@linutronix.de>,
Cezary Rojewski <cezary.rojewski@intel.com>
Cc: Ingo Molnar <mingo@redhat.com>,
Dave Hansen <dave.hansen@linux.intel.com>,
Thomas Gleixner <tglx@linutronix.de>,
Andrew Cooper <andrew.cooper3@citrix.com>,
Sean Christopherson <seanjc@google.com>,
David Woodhouse <dwmw2@infradead.org>,
"H. Peter Anvin" <hpa@zytor.com>,
Peter Zijlstra <peterz@infradead.org>,
Sohil Mehta <sohil.mehta@intel.com>,
John Ogness <john.ogness@linutronix.de>,
x86@kernel.org, x86-cpuid@lists.linux.dev,
LKML <linux-kernel@vger.kernel.org>,
linux-sound@vger.kernel.org
Subject: Re: [PATCH v5 01/35] ASoC: Intel: avs: Include CPUID header at file scope
Date: Thu, 16 Oct 2025 12:57:56 +0200 [thread overview]
Message-ID: <20251016105514.GCaPDPEu016XyDocfY@fat_crate.local> (raw)
In-Reply-To: <20250905121515.192792-2-darwi@linutronix.de>
On Fri, Sep 05, 2025 at 02:14:41PM +0200, Ahmed S. Darwish wrote:
> +#ifdef CONFIG_X86
> +#include <asm/cpuid/api.h>
> +static unsigned int intel_crystal_freq_hz(void)
> +{
> + return cpuid_ecx(CPUID_LEAF_TSC);
> +}
> +#else
> +static unsigned int intel_crystal_freq_hz(void)
> +{
> + return 0;
> +}
> +#endif /* !CONFIG_X86 */
Why are we even bothering with !CONFIG_X86?
Because this thing has || COMPILE_TEST in Kconfig.
But this thing gets enough compile testing on x86 already so why not simply
drop the whole unnecessary gunk?
---
diff --git a/sound/soc/intel/Kconfig b/sound/soc/intel/Kconfig
index 412555e626b8..63367364916a 100644
--- a/sound/soc/intel/Kconfig
+++ b/sound/soc/intel/Kconfig
@@ -95,7 +95,7 @@ config SND_SOC_INTEL_KEEMBAY
config SND_SOC_INTEL_AVS
tristate "Intel AVS driver"
- depends on X86 || COMPILE_TEST
+ depends on X86
depends on PCI
depends on COMMON_CLK
select ACPI_NHLT if ACPI
diff --git a/sound/soc/intel/avs/tgl.c b/sound/soc/intel/avs/tgl.c
index afb066516101..d920488d24b1 100644
--- a/sound/soc/intel/avs/tgl.c
+++ b/sound/soc/intel/avs/tgl.c
@@ -11,7 +11,7 @@
#include "debug.h"
#include "messages.h"
-#define CPUID_TSC_LEAF 0x15
+#include <asm/cpuid/api.h>
static int avs_tgl_dsp_core_power(struct avs_dev *adev, u32 core_mask, bool power)
{
@@ -44,18 +44,15 @@ static int avs_tgl_config_basefw(struct avs_dev *adev)
{
struct pci_dev *pci = adev->base.pci;
struct avs_bus_hwid hwid;
+ unsigned int freq;
int ret;
-#ifdef CONFIG_X86
- unsigned int ecx;
-#include <asm/cpuid/api.h>
- ecx = cpuid_ecx(CPUID_TSC_LEAF);
- if (ecx) {
- ret = avs_ipc_set_fw_config(adev, 1, AVS_FW_CFG_XTAL_FREQ_HZ, sizeof(ecx), &ecx);
+ freq = cpuid_ecx(CPUID_LEAF_TSC);
+ if (freq) {
+ ret = avs_ipc_set_fw_config(adev, 1, AVS_FW_CFG_XTAL_FREQ_HZ, sizeof(freq), &freq);
if (ret)
return AVS_IPC_RET(ret);
}
-#endif
hwid.device = pci->device;
hwid.subsystem = pci->subsystem_vendor | (pci->subsystem_device << 16);
--
Regards/Gruss,
Boris.
https://people.kernel.org/tglx/notes-about-netiquette
next prev parent reply other threads:[~2025-10-16 10:58 UTC|newest]
Thread overview: 51+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-09-05 12:14 [PATCH v5 00/35] x86: Introduce a centralized CPUID data model Ahmed S. Darwish
2025-09-05 12:14 ` [PATCH v5 01/35] ASoC: Intel: avs: Include CPUID header at file scope Ahmed S. Darwish
2025-10-16 10:57 ` Borislav Petkov [this message]
2025-10-16 19:21 ` Ahmed S. Darwish
2026-03-20 12:39 ` Borislav Petkov
2025-09-05 12:14 ` [PATCH v5 02/35] treewide: Explicitly include the x86 CPUID headers Ahmed S. Darwish
2025-09-05 12:14 ` [PATCH v5 03/35] x86/cpu: <asm/processor.h>: Do not include the CPUID API header Ahmed S. Darwish
2025-09-05 12:14 ` [PATCH v5 04/35] x86/cpuid: Rename cpuid_leaf()/cpuid_subleaf() APIs Ahmed S. Darwish
2025-10-28 17:50 ` Borislav Petkov
2025-09-05 12:14 ` [PATCH v5 05/35] x86/cpu/cacheinfo: Simplify cacheinfo_amd_init_llc_id() using _cpuid4_info Ahmed S. Darwish
2025-09-05 12:14 ` [PATCH v5 06/35] x86/cpuid: Introduce <asm/cpuid/leaf_types.h> Ahmed S. Darwish
2025-09-05 12:14 ` [PATCH v5 07/35] x86: Introduce a centralized CPUID data model Ahmed S. Darwish
2026-01-16 20:31 ` Borislav Petkov
2026-01-26 13:04 ` Ahmed S. Darwish
2026-01-29 16:07 ` Borislav Petkov
2026-01-29 17:16 ` Ahmed S. Darwish
2025-09-05 12:14 ` [PATCH v5 08/35] x86/cpuid: Introduce a centralized CPUID parser Ahmed S. Darwish
2025-09-18 13:15 ` Ahmed S. Darwish
2026-01-21 21:45 ` Borislav Petkov
2026-01-26 13:14 ` Ahmed S. Darwish
2025-09-05 12:14 ` [PATCH v5 09/35] x86/cpu: Use parsed CPUID(0x0) Ahmed S. Darwish
2026-03-04 14:58 ` Borislav Petkov
2025-09-05 12:14 ` [PATCH v5 10/35] x86/lib: Add CPUID(0x1) CPU family and model calculation Ahmed S. Darwish
2026-03-04 19:43 ` Borislav Petkov
2026-03-05 8:24 ` Ahmed S. Darwish
2025-09-05 12:14 ` [PATCH v5 11/35] x86/cpu: Use parsed CPUID(0x1) Ahmed S. Darwish
2025-09-05 12:14 ` [PATCH v5 12/35] x86/cpuid: Parse CPUID(0x80000000) Ahmed S. Darwish
2025-09-05 12:14 ` [PATCH v5 13/35] x86/cpu: Use parsed CPUID(0x80000000) Ahmed S. Darwish
2025-09-05 12:14 ` [PATCH v5 14/35] x86/cpuid: Parse CPUID(0x80000002) to CPUID(0x80000004) Ahmed S. Darwish
2025-09-05 12:14 ` [PATCH v5 15/35] x86/cpu: Use parsed CPUID(0x80000002)..CPUID(0x80000004) Ahmed S. Darwish
2025-09-05 12:14 ` [PATCH v5 16/35] x86/cpuid: Introduce a parser leaf x86 vendor table Ahmed S. Darwish
2025-09-05 12:14 ` [PATCH v5 17/35] x86/cpuid: Introduce a parser debugfs interface Ahmed S. Darwish
2025-09-05 12:14 ` [PATCH v5 18/35] x86/cpuid: Parse CPUID(0x2) Ahmed S. Darwish
2025-09-05 12:14 ` [PATCH v5 19/35] x86/cpuid: Warn once on invalid CPUID(0x2) iteration count Ahmed S. Darwish
2025-09-05 12:15 ` [PATCH v5 20/35] x86/cpuid: Introduce parsed CPUID(0x2) API Ahmed S. Darwish
2025-09-05 12:15 ` [PATCH v5 21/35] x86/cpu: Use parsed CPUID(0x2) Ahmed S. Darwish
2025-09-05 12:15 ` [PATCH v5 22/35] x86/cacheinfo: " Ahmed S. Darwish
2025-09-05 12:15 ` [PATCH v5 23/35] x86/cpuid: Remove direct CPUID(0x2) query API Ahmed S. Darwish
2025-09-05 12:15 ` [PATCH v5 24/35] x86/cpuid: Parse 'deterministic cache parameters' CPUID leaves Ahmed S. Darwish
2025-09-05 12:15 ` [PATCH v5 25/35] x86/cacheinfo: Pass a 'struct cpuinfo_x86' refrence to CPUID(0x4) code Ahmed S. Darwish
2025-09-05 12:15 ` [PATCH v5 26/35] x86/cacheinfo: Use parsed CPUID(0x4) Ahmed S. Darwish
2025-09-05 12:15 ` [PATCH v5 27/35] x86/cacheinfo: Use parsed CPUID(0x8000001d) Ahmed S. Darwish
2025-09-05 12:15 ` [PATCH v5 28/35] x86/cpuid: Parse CPUID(0x80000005) and CPUID(0x80000006) Ahmed S. Darwish
2025-09-05 12:15 ` [PATCH v5 29/35] x86/cacheinfo: Use auto-generated data types Ahmed S. Darwish
2025-09-05 12:15 ` [PATCH v5 30/35] x86/cacheinfo: Use parsed CPUID(0x80000005) and CPUID(0x80000006) Ahmed S. Darwish
2025-09-05 12:15 ` [PATCH v5 31/35] x86/cacheinfo: Use parsed CPUID(0x80000006) Ahmed S. Darwish
2025-09-05 12:15 ` [PATCH v5 32/35] x86/cpu: Rescan CPUID table after PSN disable Ahmed S. Darwish
2025-09-05 12:15 ` [PATCH v5 33/35] x86/cpu: Rescan CPUID table after unlocking full CPUID range Ahmed S. Darwish
2025-09-05 12:15 ` [PATCH v5 34/35] x86/cpuid: Parse CPUID(0x16) Ahmed S. Darwish
2025-09-05 12:15 ` [PATCH v5 35/35] x86/tsc: Use parsed CPUID(0x16) Ahmed S. Darwish
2025-09-05 12:52 ` [PATCH v5 00/35] x86: Introduce a centralized CPUID data model Ahmed S. Darwish
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