From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from bali.collaboradmins.com (bali.collaboradmins.com [148.251.105.195]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4A7D82E03F1; Thu, 16 Oct 2025 14:22:42 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=148.251.105.195 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1760624564; cv=none; b=e46XdIQAtJEjjXQJH7/evXYBaJOqCwh2WMC9UTrFbHofzNx8RbC6CVfnfvRsDJxkhdS1uAwbELAls3+fE/UViKL5tHx/gBJyxUInseSEu2oW8HX9jfPjmFgxA8/+sOIFPOk0D/zUlEAe+esvRPi5ntDzbZ0pNLo7R3y1WzWCvIQ= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1760624564; c=relaxed/simple; bh=apsk0n9LP0pfN4KmEcA5GNt1BPZ+Gwl5lIX8tFwQFk4=; h=From:To:Cc:Subject:Date:Message-Id:MIME-Version; b=DVTScl6izNbLu3oNXa8+zDLJyS9A5sc0xQewB+8MqxQEzlNhhQVXf6FIHpCZ2x88zQy9iCWMxiEATuf8fZaSCDGxPZzCUOBTYweZ0BRgtUrUdAb3qmqxxijKVPFyITq+b+TS0l/q4LaGXeXUZr3LCy4+9rxNw78GI42eOBT58hk= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com; spf=pass smtp.mailfrom=collabora.com; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b=jWcXD+Tg; arc=none smtp.client-ip=148.251.105.195 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=collabora.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b="jWcXD+Tg" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1760624560; bh=apsk0n9LP0pfN4KmEcA5GNt1BPZ+Gwl5lIX8tFwQFk4=; h=From:To:Cc:Subject:Date:From; b=jWcXD+TgI0b8prmzmR5o52mLGflkFQYM21kVd4cN0VDoyoBi+/06ImudEtMBoyFcB 63UU5/xCd1WICMu6cMEQ3609NGPBELAvGnMj2y3GlBLWDA7D2EpKhBdcTiDPUACqc6 /KThBqkEDxJFS86Thr7fngznymJANAD1NSZSj/C12yFLieLIVL57bbX7XWcMpSiFk3 edV/+rXxIq35ijrNpwCW206/UaWmrW8BHCs/KWaJPm9MgB0XqNV01auyTjuS4/80Kh kPa5FC/afI7DsG+i4gFfeqrkgE4ePTbb0h1HEO4GAccJ7SSaAzwZqs2fmDn6Dvpjtz eM1q52t/vcyHA== Received: from laura.lan (unknown [IPv6:2001:b07:646b:e2:655a:5eaa:d2ad:4ee4]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: laura.nao) by bali.collaboradmins.com (Postfix) with ESMTPSA id 3490817E0125; Thu, 16 Oct 2025 16:22:39 +0200 (CEST) From: Laura Nao To: srini@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, rafael@kernel.org, daniel.lezcano@linaro.org, rui.zhang@intel.com, lukasz.luba@arm.com, matthias.bgg@gmail.com, angelogioacchino.delregno@collabora.com Cc: nfraprado@collabora.com, arnd@arndb.de, colin.i.king@gmail.com, u.kleine-koenig@baylibre.com, andrew-ct.chen@mediatek.com, lala.lin@mediatek.com, bchihi@baylibre.com, frank-w@public-files.de, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, kernel@collabora.com, Laura Nao Subject: [PATCH RESEND v3 0/9] Add thermal sensor driver support for Mediatek MT8196 Date: Thu, 16 Oct 2025 16:21:49 +0200 Message-Id: <20251016142158.740242-1-laura.nao@collabora.com> X-Mailer: git-send-email 2.39.5 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit This patch series extends the MediaTek LVTS thermal driver to support the MT8196 SoC. MT8196 requires a different implementation of the lvts_temp_to_raw() function. To support this, the series introduces: - A new struct lvts_platform_ops to allow platform-specific conversion logic between raw sensor values and temperature - A variant of the lvts_temp_to_raw() implementation - Platform data and controller definitions for MT8196 Link to v2: https://lore.kernel.org/all/20250730152128.311109-1-laura.nao@collabora.com/ Changes in v3: - Make ops in struct lvts_data a pointer to const struct lvts_platform_ops - Changed mediatek,mt8188-efuse const entry in eFuse binding to an enum with mediatek,mt8196-efuse and mediatek,mt8188-efuse, dropped mediatek,mt8196-efuse const entry Laura Nao (9): dt-bindings: thermal: mediatek: Add LVTS thermal controller support for MT8196 thermal/drivers/mediatek/lvts: Make number of calibration offsets configurable thermal/drivers/mediatek/lvts: Guard against zero temp_factor in lvts_raw_to_temp thermal: mediatek: lvts: Add platform ops to support alternative conversion logic thermal/drivers/mediatek/lvts: Add lvts_temp_to_raw variant thermal/drivers/mediatek/lvts: Add support for ATP mode thermal/drivers/mediatek/lvts: Support MSR offset for 16-bit calibration data thermal/drivers/mediatek/lvts_thermal: Add MT8196 support dt-bindings: nvmem: mediatek: efuse: Add support for MT8196 .../bindings/nvmem/mediatek,efuse.yaml | 4 +- .../thermal/mediatek,lvts-thermal.yaml | 2 + drivers/thermal/mediatek/lvts_thermal.c | 305 ++++++++++++++++-- .../thermal/mediatek,lvts-thermal.h | 26 ++ 4 files changed, 314 insertions(+), 23 deletions(-) -- 2.39.5