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[82.69.66.36]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-427ea5bab52sm14419230f8f.22.2025.10.20.03.05.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 20 Oct 2025 03:05:14 -0700 (PDT) Date: Mon, 20 Oct 2025 11:05:13 +0100 From: David Laight To: Ryan Neph Cc: Lucas De Marchi , "Thomas =?UTF-8?B?SGVsbHN0?= =?UTF-8?B?csO2bQ==?=" , Rodrigo Vivi , David Airlie , Simona Vetter , intel-xe@lists.freedesktop.org, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH 2/2] drm/xe/configfs: fix clang warnings for missing parameter name Message-ID: <20251020110513.48d18788@pumpkin> In-Reply-To: <20251017-rn-cfi-v1-2-bf66e6ad4fcd@google.com> References: <20251017-rn-cfi-v1-0-bf66e6ad4fcd@google.com> <20251017-rn-cfi-v1-2-bf66e6ad4fcd@google.com> X-Mailer: Claws Mail 4.1.1 (GTK 3.24.38; arm-unknown-linux-gnueabihf) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit On Fri, 17 Oct 2025 12:46:26 -0700 Ryan Neph wrote: > Fixes warning from clang-17 that look like: > > drivers/gpu/drm/xe/xe_configfs.h:35:97: error: omitting the parameter name in a function definition is a C2x extension [-Werror,-Wc2x-extensions] > 35 | static inline u32 xe_configfs_get_ctx_restore_post_bb(struct pci_dev *pdev, enum xe_engine_class, Why did that become invalid? It has pretty much always been used - and can be used to avoid -Wshadow warnings. This looks like a clang bug. And you'd want a specific -W 'knob' for it as well. At a guess the C2x extension lets the name be omitted in the function body for an unused parameter (the same as C++). I think that is the 'definition' and the ones being changed here are the 'declaration'. But I might be wrong. David > > Signed-off-by: Ryan Neph > --- > drivers/gpu/drm/xe/xe_configfs.h | 10 ++++++---- > 1 file changed, 6 insertions(+), 4 deletions(-) > > diff --git a/drivers/gpu/drm/xe/xe_configfs.h b/drivers/gpu/drm/xe/xe_configfs.h > index fed57be0b90e146d57d966bab0e55e1723513997..a0d614b37efd54b89390f04a238aef1a8d4df4e2 100644 > --- a/drivers/gpu/drm/xe/xe_configfs.h > +++ b/drivers/gpu/drm/xe/xe_configfs.h > @@ -21,9 +21,9 @@ bool xe_configfs_primary_gt_allowed(struct pci_dev *pdev); > bool xe_configfs_media_gt_allowed(struct pci_dev *pdev); > u64 xe_configfs_get_engines_allowed(struct pci_dev *pdev); > bool xe_configfs_get_psmi_enabled(struct pci_dev *pdev); > -u32 xe_configfs_get_ctx_restore_mid_bb(struct pci_dev *pdev, enum xe_engine_class, > +u32 xe_configfs_get_ctx_restore_mid_bb(struct pci_dev *pdev, enum xe_engine_class class, > const u32 **cs); > -u32 xe_configfs_get_ctx_restore_post_bb(struct pci_dev *pdev, enum xe_engine_class, > +u32 xe_configfs_get_ctx_restore_post_bb(struct pci_dev *pdev, enum xe_engine_class class, > const u32 **cs); > #ifdef CONFIG_PCI_IOV > unsigned int xe_configfs_get_max_vfs(struct pci_dev *pdev); > @@ -37,9 +37,11 @@ static inline bool xe_configfs_primary_gt_allowed(struct pci_dev *pdev) { return > static inline bool xe_configfs_media_gt_allowed(struct pci_dev *pdev) { return true; } > static inline u64 xe_configfs_get_engines_allowed(struct pci_dev *pdev) { return U64_MAX; } > static inline bool xe_configfs_get_psmi_enabled(struct pci_dev *pdev) { return false; } > -static inline u32 xe_configfs_get_ctx_restore_mid_bb(struct pci_dev *pdev, enum xe_engine_class, > +static inline u32 xe_configfs_get_ctx_restore_mid_bb(struct pci_dev *pdev, > + enum xe_engine_class class, > const u32 **cs) { return 0; } > -static inline u32 xe_configfs_get_ctx_restore_post_bb(struct pci_dev *pdev, enum xe_engine_class, > +static inline u32 xe_configfs_get_ctx_restore_post_bb(struct pci_dev *pdev, > + enum xe_engine_class class, > const u32 **cs) { return 0; } > static inline unsigned int xe_configfs_get_max_vfs(struct pci_dev *pdev) { return UINT_MAX; } > #endif >