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Tue, 21 Oct 2025 16:21:43 -0700 (PDT) Date: Tue, 21 Oct 2025 16:21:42 -0700 From: Andrew Jones To: Yao Zihong Cc: alex@ghiti.fr, alexghiti@rivosinc.com, aou@eecs.berkeley.edu, cleger@rivosinc.com, evan@rivosinc.com, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, palmer@dabbelt.com, pjw@kernel.org, samuel.holland@sifive.com, shuah@kernel.org, zhangyin2018@iscas.ac.cn, zihongyao@outlook.com Subject: Re: [PATCH v3 1/2] riscv: hwprobe: Expose Zicbop extension and its block size Message-ID: <20251021-be53f84c246523b7c4e31917@orel> References: <20251020152924.64551-1-zihong.plct@isrc.iscas.ac.cn> <20251020153309.68267-1-zihong.plct@isrc.iscas.ac.cn> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20251020153309.68267-1-zihong.plct@isrc.iscas.ac.cn> On Mon, Oct 20, 2025 at 11:33:08PM +0800, Yao Zihong wrote: > - Add `RISCV_HWPROBE_EXT_ZICBOP` to report the presence of the > Zicbop extension. > - Add `RISCV_HWPROBE_KEY_ZICBOP_BLOCK_SIZE` to expose the block > size (in bytes) when Zicbop is supported. > - Update hwprobe.rst to document the new extension bit and block > size key, following the existing Zicbom/Zicboz style. > > Signed-off-by: Yao Zihong > --- > Documentation/arch/riscv/hwprobe.rst | 8 +++++++- > arch/riscv/include/asm/hwprobe.h | 2 +- > arch/riscv/include/uapi/asm/hwprobe.h | 2 ++ > arch/riscv/kernel/sys_hwprobe.c | 6 ++++++ > 4 files changed, 16 insertions(+), 2 deletions(-) > > diff --git a/Documentation/arch/riscv/hwprobe.rst b/Documentation/arch/riscv/hwprobe.rst > index 2f449c9b15bd..52f12af43b9d 100644 > --- a/Documentation/arch/riscv/hwprobe.rst > +++ b/Documentation/arch/riscv/hwprobe.rst > @@ -275,6 +275,9 @@ The following keys are defined: > ratified in commit 49f49c842ff9 ("Update to Rafified state") of > riscv-zabha. > > + * :c:macro:`RISCV_HWPROBE_EXT_ZICBOP`: The Zicbop extension is supported, as > + ratified in commit 3dd606f ("Create cmobase-v1.0.pdf") of riscv-CMOs. > + > * :c:macro:`RISCV_HWPROBE_KEY_CPUPERF_0`: Deprecated. Returns similar values to > :c:macro:`RISCV_HWPROBE_KEY_MISALIGNED_SCALAR_PERF`, but the key was > mistakenly classified as a bitmask rather than a value. > @@ -369,4 +372,7 @@ The following keys are defined: > > * :c:macro:`RISCV_HWPROBE_VENDOR_EXT_XSFVFWMACCQQQ`: The Xsfvfwmaccqqq > vendor extension is supported in version 1.0 of Matrix Multiply Accumulate > - Instruction Extensions Specification. > \ No newline at end of file > + Instruction Extensions Specification. > + > +* :c:macro:`RISCV_HWPROBE_KEY_ZICBOP_BLOCK_SIZE`: An unsigned int which > + represents the size of the Zicbop block in bytes. > diff --git a/arch/riscv/include/asm/hwprobe.h b/arch/riscv/include/asm/hwprobe.h > index 948d2b34e94e..2f278c395af9 100644 > --- a/arch/riscv/include/asm/hwprobe.h > +++ b/arch/riscv/include/asm/hwprobe.h > @@ -8,7 +8,7 @@ > > #include > > -#define RISCV_HWPROBE_MAX_KEY 14 > +#define RISCV_HWPROBE_MAX_KEY 15 > > static inline bool riscv_hwprobe_key_is_valid(__s64 key) > { > diff --git a/arch/riscv/include/uapi/asm/hwprobe.h b/arch/riscv/include/uapi/asm/hwprobe.h > index 5d30a4fae37a..9cc508be54c5 100644 > --- a/arch/riscv/include/uapi/asm/hwprobe.h > +++ b/arch/riscv/include/uapi/asm/hwprobe.h > @@ -82,6 +82,7 @@ struct riscv_hwprobe { > #define RISCV_HWPROBE_EXT_ZAAMO (1ULL << 56) > #define RISCV_HWPROBE_EXT_ZALRSC (1ULL << 57) > #define RISCV_HWPROBE_EXT_ZABHA (1ULL << 58) > +#define RISCV_HWPROBE_EXT_ZICBOP (1ULL << 59) > #define RISCV_HWPROBE_KEY_CPUPERF_0 5 > #define RISCV_HWPROBE_MISALIGNED_UNKNOWN (0 << 0) > #define RISCV_HWPROBE_MISALIGNED_EMULATED (1 << 0) > @@ -107,6 +108,7 @@ struct riscv_hwprobe { > #define RISCV_HWPROBE_KEY_ZICBOM_BLOCK_SIZE 12 > #define RISCV_HWPROBE_KEY_VENDOR_EXT_SIFIVE_0 13 > #define RISCV_HWPROBE_KEY_VENDOR_EXT_MIPS_0 14 > +#define RISCV_HWPROBE_KEY_ZICBOP_BLOCK_SIZE 15 > /* Increase RISCV_HWPROBE_MAX_KEY when adding items. */ > > /* Flags */ > diff --git a/arch/riscv/kernel/sys_hwprobe.c b/arch/riscv/kernel/sys_hwprobe.c > index 000f4451a9d8..7a6ae1327504 100644 > --- a/arch/riscv/kernel/sys_hwprobe.c > +++ b/arch/riscv/kernel/sys_hwprobe.c > @@ -113,6 +113,7 @@ static void hwprobe_isa_ext0(struct riscv_hwprobe *pair, > EXT_KEY(ZCB); > EXT_KEY(ZCMOP); > EXT_KEY(ZICBOM); > + EXT_KEY(ZICBOP); > EXT_KEY(ZICBOZ); > EXT_KEY(ZICNTR); > EXT_KEY(ZICOND); > @@ -293,6 +294,11 @@ static void hwprobe_one_pair(struct riscv_hwprobe *pair, > if (hwprobe_ext0_has(cpus, RISCV_HWPROBE_EXT_ZICBOM)) > pair->value = riscv_cbom_block_size; > break; > + case RISCV_HWPROBE_KEY_ZICBOP_BLOCK_SIZE: > + pair->value = 0; > + if (hwprobe_ext0_has(cpus, RISCV_HWPROBE_EXT_ZICBOP)) > + pair->value = riscv_cbop_block_size; > + break; > case RISCV_HWPROBE_KEY_HIGHEST_VIRT_ADDRESS: > pair->value = user_max_virt_addr(); > break; > -- > 2.47.2 > Reviewed-by: Andrew Jones