[RFC PATCH v1 1/4] riscv: mm: Introduce percpu loaded_asid

[Xu Lu <luxu.kernel@bytedance.com>]

The percpu loaded_asid records the asid currently used by each CPU.

Signed-off-by: Xu Lu <luxu.kernel@bytedance.com>
---
 arch/riscv/include/asm/mmu_context.h | 1 +
 arch/riscv/mm/context.c              | 4 ++++
 2 files changed, 5 insertions(+)

diff --git a/arch/riscv/include/asm/mmu_context.h b/arch/riscv/include/asm/mmu_context.h
index 8c4bc49a3a0f5..fd532f8e8d057 100644
--- a/arch/riscv/include/asm/mmu_context.h
+++ b/arch/riscv/include/asm/mmu_context.h
@@ -39,6 +39,7 @@ static inline int init_new_context(struct task_struct *tsk,
 }
 
 DECLARE_STATIC_KEY_FALSE(use_asid_allocator);
+DECLARE_PER_CPU(unsigned long, loaded_asid);
 
 #ifdef CONFIG_RISCV_ISA_SUPM
 #define mm_untag_mask mm_untag_mask
diff --git a/arch/riscv/mm/context.c b/arch/riscv/mm/context.c
index 55c20ad1f7444..4d5792c3a8c19 100644
--- a/arch/riscv/mm/context.c
+++ b/arch/riscv/mm/context.c
@@ -32,6 +32,8 @@ static unsigned long *context_asid_map;
 static DEFINE_PER_CPU(atomic_long_t, active_context);
 static DEFINE_PER_CPU(unsigned long, reserved_context);
 
+DEFINE_PER_CPU(unsigned long, loaded_asid) = 0;
+
 static bool check_update_reserved_context(unsigned long cntx,
 					  unsigned long newcntx)
 {
@@ -193,6 +195,8 @@ static void set_mm_asid(struct mm_struct *mm, unsigned int cpu)
 		  (cntx2asid(cntx) << SATP_ASID_SHIFT) |
 		  satp_mode);
 
+	this_cpu_write(loaded_asid, cntx2asid(cntx));
+
 	if (need_flush_tlb)
 		local_flush_tlb_all();
 }
-- 
2.20.1