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[103.229.16.4]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-3415a1c2f12sm3601755a91.5.2025.11.04.00.12.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 04 Nov 2025 00:12:19 -0800 (PST) From: Wangao Wang Date: Tue, 04 Nov 2025 16:11:49 +0800 Subject: [PATCH v3 5/5] media: qcom: iris: Add intra refresh support for encoder Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20251104-iris_encoder_enhancements-v3-5-63b0c431b4d0@oss.qualcomm.com> References: <20251104-iris_encoder_enhancements-v3-0-63b0c431b4d0@oss.qualcomm.com> In-Reply-To: <20251104-iris_encoder_enhancements-v3-0-63b0c431b4d0@oss.qualcomm.com> To: Vikash Garodia , Dikshita Agarwal , Abhinav Kumar , Bryan O'Donoghue , Mauro Carvalho Chehab Cc: linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, Wangao Wang , Neil Armstrong , quic_qiweil@quicinc.com, quic_renjiang@quicinc.com X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1762243916; l=6329; i=wangao.wang@oss.qualcomm.com; s=20251021; h=from:subject:message-id; bh=JQ5iyKLsbTvW1G+rebQp49wNfxcQrPn+UClBYzR7ixg=; b=TcK//9baQOw2TlSEFWyDTK/iUPbdeGNoVkJeKYT80uYvrw+VWtJgVt8a+NWPUMQolPWRBifcc kYREASxZLX+CE0/x/albrrqVgEf6dptdKQFNcPUbFBNJ600x8zNras3 X-Developer-Key: i=wangao.wang@oss.qualcomm.com; a=ed25519; pk=bUPgYblBUAsoPyGfssbNR7ZXUSGF8v1VF4FJzSO6/aA= X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUxMTA0MDA2NiBTYWx0ZWRfX1g1c5i34KVPr G5ZRHMyTVgiY8+fPZ+vAu7cX5g0+koVyClKtREZxD6llsuT0ImiDqlT/cnRvffritb8kUpHWtNc tQbDF0WYQqe0VFvjYs3vDulUqVrrF4vuhZOqEd3kvd2shJ6+hSAVfILXUwG6ODBUZZ5KSNXcZ+a 99A7pdUz1nNjCLhpjlG2EAdt4gaKcnxN9o+PDVy6JwezRZSzMNioW0Yt17R6+xIvw7DgILcXMJb 2Emp/x0zJDBlVvZCnCuNixawPNsJfskFpDsQ2QvIQciHZ3yiDXwL9tJnNGKPpsU1Ar8pkZ2/2lT DJFewfeElrCWffJPWzMhoPVgr170e5bzqh2EcmSJbCuc051fLIDEji8qgICRLkOuw70wh1cqHwh tf7y2aoR6+GiagpUvbL2iHMVj/JV+Q== X-Proofpoint-ORIG-GUID: DM193OaSawEPTICX7Fx4GYTWvbRrbvX1 X-Authority-Analysis: v=2.4 cv=CbsFJbrl c=1 sm=1 tr=0 ts=6909b566 cx=c_pps a=UNFcQwm+pnOIJct1K4W+Mw==:117 a=nuhDOHQX5FNHPW3J6Bj6AA==:17 a=IkcTkHD0fZMA:10 a=6UeiqGixMTsA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=KKAkSRfTAAAA:8 a=EUspDBNiAAAA:8 a=-vM60OG-bLC5KXgFrusA:9 a=QEXdDO2ut3YA:10 a=uKXjsCUrEbL0IQVhDsJ9:22 a=cvBusfyB2V15izCimMoJ:22 X-Proofpoint-GUID: DM193OaSawEPTICX7Fx4GYTWvbRrbvX1 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.9,FMLib:17.12.100.49 definitions=2025-11-03_06,2025-11-03_03,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 spamscore=0 bulkscore=0 impostorscore=0 suspectscore=0 lowpriorityscore=0 clxscore=1015 malwarescore=0 adultscore=0 phishscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2510240001 definitions=main-2511040066 Add support for V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD and V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE controls. Tested-by: Neil Armstrong # on SM8650-HDK Signed-off-by: Wangao Wang --- drivers/media/platform/qcom/iris/iris_ctrls.c | 33 ++++++++++++++++++++++ drivers/media/platform/qcom/iris/iris_ctrls.h | 1 + .../platform/qcom/iris/iris_hfi_gen2_defines.h | 2 ++ .../platform/qcom/iris/iris_platform_common.h | 2 ++ .../media/platform/qcom/iris/iris_platform_gen2.c | 19 +++++++++++++ 5 files changed, 57 insertions(+) diff --git a/drivers/media/platform/qcom/iris/iris_ctrls.c b/drivers/media/platform/qcom/iris/iris_ctrls.c index 8f74c12f2f41f23d75424819c707aff61ea61b33..14891569247318aaa7b2009b737f077d1cb45095 100644 --- a/drivers/media/platform/qcom/iris/iris_ctrls.c +++ b/drivers/media/platform/qcom/iris/iris_ctrls.c @@ -104,6 +104,10 @@ static enum platform_inst_fw_cap_type iris_get_cap_id(u32 id) return HFLIP; case V4L2_CID_VFLIP: return VFLIP; + case V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE: + return IR_TYPE; + case V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD: + return IR_PERIOD; default: return INST_FW_CAP_MAX; } @@ -197,6 +201,10 @@ static u32 iris_get_v4l2_id(enum platform_inst_fw_cap_type cap_id) return V4L2_CID_HFLIP; case VFLIP: return V4L2_CID_VFLIP; + case IR_TYPE: + return V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE; + case IR_PERIOD: + return V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD; default: return 0; } @@ -944,6 +952,31 @@ int iris_set_flip(struct iris_inst *inst, enum platform_inst_fw_cap_type cap_id) &hfi_val, sizeof(u32)); } +int iris_set_ir_period(struct iris_inst *inst, enum platform_inst_fw_cap_type cap_id) +{ + const struct iris_hfi_command_ops *hfi_ops = inst->core->hfi_ops; + struct vb2_queue *q = v4l2_m2m_get_dst_vq(inst->m2m_ctx); + u32 ir_period = inst->fw_caps[cap_id].value; + u32 ir_type = 0; + + if (inst->fw_caps[IR_TYPE].value == + V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE_RANDOM) { + if (vb2_is_streaming(q)) + return 0; + ir_type = HFI_PROP_IR_RANDOM_PERIOD; + } else if (inst->fw_caps[IR_TYPE].value == + V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE_CYCLIC) { + ir_type = HFI_PROP_IR_CYCLIC_PERIOD; + } else + return -EINVAL; + + return hfi_ops->session_set_property(inst, ir_type, + HFI_HOST_FLAGS_NONE, + iris_get_port_info(inst, cap_id), + HFI_PAYLOAD_U32, + &ir_period, sizeof(u32)); +} + int iris_set_properties(struct iris_inst *inst, u32 plane) { const struct iris_hfi_command_ops *hfi_ops = inst->core->hfi_ops; diff --git a/drivers/media/platform/qcom/iris/iris_ctrls.h b/drivers/media/platform/qcom/iris/iris_ctrls.h index 355a592049f3fcc715a1b9df44b4d1398b052653..9518803577bc39f5c1339a49878dd0c3e8f510ad 100644 --- a/drivers/media/platform/qcom/iris/iris_ctrls.h +++ b/drivers/media/platform/qcom/iris/iris_ctrls.h @@ -34,6 +34,7 @@ int iris_set_frame_qp(struct iris_inst *inst, enum platform_inst_fw_cap_type cap int iris_set_qp_range(struct iris_inst *inst, enum platform_inst_fw_cap_type cap_id); int iris_set_rotation(struct iris_inst *inst, enum platform_inst_fw_cap_type cap_id); int iris_set_flip(struct iris_inst *inst, enum platform_inst_fw_cap_type cap_id); +int iris_set_ir_period(struct iris_inst *inst, enum platform_inst_fw_cap_type cap_id); int iris_set_properties(struct iris_inst *inst, u32 plane); #endif diff --git a/drivers/media/platform/qcom/iris/iris_hfi_gen2_defines.h b/drivers/media/platform/qcom/iris/iris_hfi_gen2_defines.h index 0f92468dca91cbb2ca9b451ebce255180066b3a4..9e8fdddf2aef439e7f133c9bb2fafa6d95062b02 100644 --- a/drivers/media/platform/qcom/iris/iris_hfi_gen2_defines.h +++ b/drivers/media/platform/qcom/iris/iris_hfi_gen2_defines.h @@ -70,6 +70,7 @@ enum hfi_rate_control { #define HFI_PROP_QP_PACKED 0x0300012e #define HFI_PROP_MIN_QP_PACKED 0x0300012f #define HFI_PROP_MAX_QP_PACKED 0x03000130 +#define HFI_PROP_IR_RANDOM_PERIOD 0x03000131 #define HFI_PROP_TOTAL_BITRATE 0x0300013b #define HFI_PROP_MAX_GOP_FRAMES 0x03000146 #define HFI_PROP_MAX_B_FRAMES 0x03000147 @@ -108,6 +109,7 @@ enum hfi_flip { #define HFI_PROP_BUFFER_MARK 0x0300016c #define HFI_PROP_RAW_RESOLUTION 0x03000178 #define HFI_PROP_TOTAL_PEAK_BITRATE 0x0300017C +#define HFI_PROP_IR_CYCLIC_PERIOD 0x0300017E #define HFI_PROP_COMV_BUFFER_COUNT 0x03000193 #define HFI_PROP_END 0x03FFFFFF diff --git a/drivers/media/platform/qcom/iris/iris_platform_common.h b/drivers/media/platform/qcom/iris/iris_platform_common.h index 284d6bde6d6bcdf70016646d1c92e6ae7f067efc..30b98e769ad34c2b63dd63e7714bfeaa5b4f162c 100644 --- a/drivers/media/platform/qcom/iris/iris_platform_common.h +++ b/drivers/media/platform/qcom/iris/iris_platform_common.h @@ -143,6 +143,8 @@ enum platform_inst_fw_cap_type { ROTATION, HFLIP, VFLIP, + IR_TYPE, + IR_PERIOD, INST_FW_CAP_MAX, }; diff --git a/drivers/media/platform/qcom/iris/iris_platform_gen2.c b/drivers/media/platform/qcom/iris/iris_platform_gen2.c index e74bdd00a4bb2f457ec9352e0acaebc820dae235..ce54aac766e2bf76fa2de64c884724ca63f05dcb 100644 --- a/drivers/media/platform/qcom/iris/iris_platform_gen2.c +++ b/drivers/media/platform/qcom/iris/iris_platform_gen2.c @@ -620,6 +620,25 @@ static struct platform_inst_fw_cap inst_fw_cap_sm8550_enc[] = { CAP_FLAG_DYNAMIC_ALLOWED, .set = iris_set_flip, }, + { + .cap_id = IR_TYPE, + .min = V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE_RANDOM, + .max = V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE_CYCLIC, + .step_or_mask = BIT(V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE_RANDOM) | + BIT(V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE_CYCLIC), + .value = V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE_RANDOM, + .flags = CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + }, + { + .cap_id = IR_PERIOD, + .min = 0, + .max = INT_MAX, + .step_or_mask = 1, + .value = 0, + .flags = CAP_FLAG_OUTPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, + .set = iris_set_ir_period, + }, }; static struct platform_inst_caps platform_inst_cap_sm8550 = { -- 2.43.0