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Thu, 06 Nov 2025 12:50:26 -0800 (PST) Received: from hu-akhilpo-hyd.qualcomm.com ([202.46.23.25]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-29651042c24sm37408815ad.50.2025.11.06.12.50.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 06 Nov 2025 12:50:26 -0800 (PST) From: Akhil P Oommen Subject: [PATCH v2 0/6] Support for Adreno 612 GPU - Respin Date: Fri, 07 Nov 2025 02:20:05 +0530 Message-Id: <20251107-qcs615-spin-2-v2-0-a2d7c4fbf6e6@oss.qualcomm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit X-B4-Tracking: v=1; b=H4sIAP0JDWkC/12OSw6DMAwFr4K8rlESkRa66j0qFgFMiVR+cUBUi Ls3QFfd2BpLb55XYHKWGO7RCo5my7bvAqhLBGVjuhehrQKDEkpLITWOJV/D4sF2qJCqRBeioiL LUgiZwVFtl8P3zE92NE5B688jFIYJy75trb9HHS0eD7UUGvZAY9n37nP8M8sj8au+/VXPEgWKw pgkqVORCf3omeNxMu/dHocB+bZtX5rPe2riAAAA X-Change-ID: 20251015-qcs615-spin-2-ed45b0deb998 To: Rob Clark , Sean Paul , Konrad Dybcio , Dmitry Baryshkov , Abhinav Kumar , Marijn Suijten , David Airlie , Simona Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Jessica Zhang Cc: Dan Carpenter , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Akhil P Oommen , Jie Zhang , Jie Zhang , Qingqing Zhou , Konrad Dybcio X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; 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In this version, we have consolidated the previously separate series for DT and driver support, along with some significant rework. Regarding A612 GPU, it falls under ADRENO_6XX_GEN1 family and is a cut down version of A615 GPU. A612 has a new IP called Reduced Graphics Management Unit or RGMU, a small state machine which helps to toggle GX GDSC (connected to CX rail) to implement the IFPC feature. Unlike a full-fledged GMU, the RGMU does not support features such as clock control, resource voting via RPMh, HFI etc. Therefore, we require linux clock driver support similar to gmu-wrapper implementations to control gpu core clock and GX GDSC. In this series, the description of RGMU hardware in devicetree is more complete than in previous version. However, the RGMU core is not initialized from the driver as there is currently no need for it. We do perform a dummy load of RGMU firmware (now available in linux-firmware) to ensure that enabling RGMU core in the future won't break backward compatibility for users. Due to significant changes compared to the old series, all R-b tags have been dropped. Please review with fresh eyes. Last 3 patches are for Bjorn and the rest are for Rob Clark for pick up. [1] Driver: https://lore.kernel.org/lkml/20241213-a612-gpu-support-v3-1-0e9b25570a69@quicinc.com/ Devicetree: https://lore.kernel.org/lkml/fu4rayftf3i4arf6l6bzqyzsctomglhpiniljkeuj74ftvzlpo@vklca2giwjlw/ Signed-off-by: Akhil P Oommen --- Changes in v2: - Rebased on next-20251105 - Fix hwcg configuration (Dan) - Reuse a few gmu-wrapper routines (Konrad) - Split out rgmu dt schema (Krzysztof/Dmitry) - Fixes for GPU dt binding doc (Krzysztof) - Removed VDD_CX from rgmu dt node. Will post a separate series to address the gpucc changes (Konrad) - Fix the reg range size for adreno smmu node and reorder the properties (Konrad) - Link to v1: https://lore.kernel.org/r/20251017-qcs615-spin-2-v1-0-0baa44f80905@oss.qualcomm.com --- Akhil P Oommen (1): dt-bindings: display/msm: gpu: Document A612 GPU Jie Zhang (4): drm/msm/a6xx: Add support for Adreno 612 dt-bindings: display/msm/rgmu: Document A612 RGMU arm64: dts: qcom: sm6150: Add gpu and rgmu nodes arm64: dts: qcom: qcs615-ride: Enable Adreno 612 GPU Qingqing Zhou (1): arm64: dts: qcom: sm6150: add the GPU SMMU node .../devicetree/bindings/display/msm/gpu.yaml | 32 ++++- .../devicetree/bindings/display/msm/rgmu.yaml | 131 +++++++++++++++++++ MAINTAINERS | 1 + arch/arm64/boot/dts/qcom/qcs615-ride.dts | 8 ++ arch/arm64/boot/dts/qcom/talos.dtsi | 138 +++++++++++++++++++++ drivers/gpu/drm/msm/adreno/a6xx_catalog.c | 16 +++ drivers/gpu/drm/msm/adreno/a6xx_gmu.c | 23 +++- drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 45 +++++-- drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c | 3 +- drivers/gpu/drm/msm/adreno/adreno_gpu.c | 1 + drivers/gpu/drm/msm/adreno/adreno_gpu.h | 16 ++- 11 files changed, 398 insertions(+), 16 deletions(-) --- base-commit: 185cd3dc1a12b97194a62eba9d217d280ef74135 change-id: 20251015-qcs615-spin-2-ed45b0deb998 Best regards, -- Akhil P Oommen