From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from bali.collaboradmins.com (bali.collaboradmins.com [148.251.105.195]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 47CE0314A62 for ; Mon, 10 Nov 2025 14:43:57 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=148.251.105.195 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1762785839; cv=none; b=m5EIxHIofUJ7M+ScC8OkBxN9rit2yv9K8h+eeuAQaGyOs6R5H/m7dZ12rfAyVzgxfqQT1adXh1wtwIoqFGSJ9Cdy8xXZ0NIcUf4fvPj+cNwSofZOrHDt8A5knJr3pI1b+Jj2WmuWcDZKvMcEkWR9jsG3t31ayP2+ZNmTnKs9ZKI= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1762785839; c=relaxed/simple; bh=WGSF1+2qqoDh4Y4z7LPzg1vrBUYL/ctGtWrdC8hI3eE=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=t18oi5V6KJi97k3jqpDRcZaV2sWhX6mDLL3dbq0Oy9/M2of/5MJIBb875P9WxZ8A7pfrLJgoHsc9TFhQZZWhBV1tgNJ6FpofguiT8w5xmZt3eazUZNYMkXwWUVcMFJYj0uAJ4fDeezhbDPP1DhQxOB30HwxoYfa60REhy0wfaLU= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com; spf=pass smtp.mailfrom=collabora.com; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b=PjxFJlwK; arc=none smtp.client-ip=148.251.105.195 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=collabora.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b="PjxFJlwK" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1762785835; bh=WGSF1+2qqoDh4Y4z7LPzg1vrBUYL/ctGtWrdC8hI3eE=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=PjxFJlwKmyvDepr4EXByCeYc3IPTxrnilt8BCsYYk1F7DENnCxbxfORcpP9dXUIlq e++Z0YDFF6j2cZvGDGIaL2SkrJcMcIwXEcQfaummgVMHhhsV3JTKcSnQ4RJrmsNzPf oZn473XI6E9FIvpSZDVM/zfMjqcFA7LlbDZaLEdWezEKD3EfqP7as1zK4ApCkS2qVa iZ5xVMw7eov6THIDpeTvebUTqckj85IpAFevJyJIgtAmQbjKAFi6GbKPRz1O3I8nxF JIsDbX6X07IzzdPWQja4yzZ1AbXZeYVrf3fAtyg94sUziNcHNaFWKM9o4qfx99GSBO IOlDnkBcCM8Rg== Received: from localhost.localdomain (unknown [92.206.121.173]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: gerddie) by bali.collaboradmins.com (Postfix) with ESMTPSA id 6637617E1313; Mon, 10 Nov 2025 15:43:55 +0100 (CET) From: gert.wollny@collabora.com To: Christian Gmeiner Cc: Lucas Stach , Russell King , David Airlie , Daniel Vetter , etnaviv@lists.freedesktop.org, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, Gert Wollny Subject: [PATCH v4 5/5] drm/etnaviv: Add module parameter to force PPU flop reset Date: Mon, 10 Nov 2025 15:37:51 +0100 Message-ID: <20251110144625.18653-6-gert.wollny@collabora.com> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20251110144625.18653-1-gert.wollny@collabora.com> References: <20250630202703.13844-1-gert.wollny@collabora.com> <20251110144625.18653-1-gert.wollny@collabora.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit From: Gert Wollny v2: Check for feature PIPE_3D when forcing PPU flop reset (Lucas) v3: - drop use of ppu_flop_reset enum (Christian Gmeiner) - don't initialize module parameter to zero (checkpatch) - avoid multi-line string in warning message (checkpatch) Signed-off-by: Gert Wollny --- drivers/gpu/drm/etnaviv/etnaviv_flop_reset.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/drivers/gpu/drm/etnaviv/etnaviv_flop_reset.c b/drivers/gpu/drm/etnaviv/etnaviv_flop_reset.c index 7c0112b3b3ad..75fe8cce1177 100644 --- a/drivers/gpu/drm/etnaviv/etnaviv_flop_reset.c +++ b/drivers/gpu/drm/etnaviv/etnaviv_flop_reset.c @@ -13,6 +13,9 @@ #include "etnaviv_flop_reset.h" +static int etnaviv_force_flop_reset; +module_param_named(force_flop_reset, etnaviv_force_flop_reset, int, 0); + #define PPU_IMAGE_STRIDE 64 #define PPU_IMAGE_XSIZE 64 #define PPU_IMAGE_YSIZE 6 @@ -148,6 +151,19 @@ bool etnaviv_flop_reset_ppu_require(const struct etnaviv_chip_identity *chip_id) return true; } + if (etnaviv_force_flop_reset) { + if (!(chip_id->features & chipFeatures_PIPE_3D)) { + pr_warn("Etnaviv: model: 0x%04x, revision: 0x%04x does not support PIPE_3D\n", + chip_id->model, chip_id->revision); + pr_warn("Request to force PPU flop reset ignored.\n"); + return false; + } + + pr_info("Force PPU flop reset for model: 0x%04x, revision: 0x%04x\n", + chip_id->model, chip_id->revision); + return true; + } + return false; } -- 2.51.0