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From: Robert Richter <rrichter@amd.com>
To: Alison Schofield <alison.schofield@intel.com>,
	Vishal Verma <vishal.l.verma@intel.com>,
	Ira Weiny <ira.weiny@intel.com>,
	Dan Williams <dan.j.williams@intel.com>,
	Jonathan Cameron <jonathan.cameron@huawei.com>,
	Dave Jiang <dave.jiang@intel.com>,
	Davidlohr Bueso <dave@stgolabs.net>
Cc: <linux-cxl@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
	Gregory Price <gourry@gourry.net>,
	"Fabio M. De Francesco" <fabio.m.de.francesco@linux.intel.com>,
	Terry Bowman <terry.bowman@amd.com>,
	Joshua Hahn <joshua.hahnjy@gmail.com>,
	Robert Richter <rrichter@amd.com>
Subject: [PATCH 2/3] cxl/acpi: Group xor arithmetric setup code in a single block
Date: Wed, 12 Nov 2025 21:51:03 +0100	[thread overview]
Message-ID: <20251112205105.1271726-3-rrichter@amd.com> (raw)
In-Reply-To: <20251112205105.1271726-1-rrichter@amd.com>

Simplify the xor arithmetric setup code by grouping it in a single
block. No need to split the block for QoS setup.

It is safe to reorder the call of cxl_setup_extended_linear_cache()
because there are no dependencies.

Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com>
Signed-off-by: Robert Richter <rrichter@amd.com>
---
v2: spell fix in descripton (Jonathan),
---
---
 drivers/cxl/acpi.c | 11 ++++-------
 1 file changed, 4 insertions(+), 7 deletions(-)

diff --git a/drivers/cxl/acpi.c b/drivers/cxl/acpi.c
index fab736aa77dc..50c2987e0459 100644
--- a/drivers/cxl/acpi.c
+++ b/drivers/cxl/acpi.c
@@ -465,8 +465,6 @@ static int __cxl_parse_cfmws(struct acpi_cedt_cfmws *cfmws,
 		ig = CXL_DECODER_MIN_GRANULARITY;
 	cxld->interleave_granularity = ig;
 
-	cxl_setup_extended_linear_cache(cxlrd);
-
 	if (cfmws->interleave_arithmetic == ACPI_CEDT_CFMWS_ARITHMETIC_XOR) {
 		if (ways != 1 && ways != 3) {
 			cxims_ctx = (struct cxl_cxims_context) {
@@ -482,15 +480,14 @@ static int __cxl_parse_cfmws(struct acpi_cedt_cfmws *cfmws,
 				return -EINVAL;
 			}
 		}
-	}
-
-	cxlrd->qos_class = cfmws->qtg_id;
-
-	if (cfmws->interleave_arithmetic == ACPI_CEDT_CFMWS_ARITHMETIC_XOR) {
 		cxlrd->ops.hpa_to_spa = cxl_apply_xor_maps;
 		cxlrd->ops.spa_to_hpa = cxl_apply_xor_maps;
 	}
 
+	cxl_setup_extended_linear_cache(cxlrd);
+
+	cxlrd->qos_class = cfmws->qtg_id;
+
 	rc = cxl_decoder_add(cxld);
 	if (rc)
 		return rc;
-- 
2.47.3


  parent reply	other threads:[~2025-11-12 20:51 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-11-12 20:51 [PATCH 0/3] CXL updates for v6.19 Robert Richter
2025-11-12 20:51 ` [PATCH 1/3] cxl: Simplify cxl_rd_ops allocation and handling Robert Richter
2025-11-12 22:35   ` Gregory Price
2025-11-12 20:51 ` Robert Richter [this message]
2025-11-12 22:36   ` [PATCH 2/3] cxl/acpi: Group xor arithmetric setup code in a single block Gregory Price
2025-11-12 22:38     ` Gregory Price
2025-11-12 20:51 ` [PATCH 3/3] cxl/region: Remove local variable @inc in cxl_port_setup_targets() Robert Richter
2025-11-12 22:40   ` Gregory Price
2025-11-12 21:45 ` [PATCH 0/3] CXL updates for v6.19 Dave Jiang
2025-11-13 11:01   ` Robert Richter
2025-11-13 15:20     ` Dave Jiang
2025-11-13 15:32       ` Gregory Price
2025-11-13 16:34         ` Dave Jiang
2025-11-13 16:45       ` Robert Richter
2025-11-13 20:10         ` Dave Jiang
2025-11-13 20:36           ` Robert Richter
2025-11-14  9:09             ` Robert Richter
2025-11-14 15:32               ` Dave Jiang
2025-11-14 16:21                 ` Robert Richter
2025-11-14 16:28                   ` Dave Jiang
2025-11-14 18:18                     ` Dave Jiang
2025-11-14 18:25                       ` Robert Richter
2025-11-14 18:35                         ` Dave Jiang
2025-11-14 20:19 ` Dave Jiang

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