From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-pf1-f201.google.com (mail-pf1-f201.google.com [209.85.210.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7121A2D5A07 for ; Thu, 13 Nov 2025 23:37:49 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.210.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1763077070; cv=none; b=nIKtP8PN2xvM6UpBB1eCLO+9ne40MdJYZocvG2YXjJRTeWmT68zY/56lj1Kfer3F9e86zz3GythF+71ShnIhAPi47QYN6ILy4AKUopRDlaNynOZpvvENzJ+SL4oa51ebiDX9LGrLIKLcZHmpgjwYMjePQFp7hNO02/8RteuALxI= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1763077070; c=relaxed/simple; bh=903kH64MTPH0FrxO2I20SFsP3QXq7CDc5tgGcADtgls=; h=Date:Mime-Version:Message-ID:Subject:From:To:Cc:Content-Type; b=lNBr8yp5m7dcax6f0ieMzQJPJQCBvh6GyssqwWVf40MhB6ym7c9CI5aAjO5Zk0xwQH9QpnGzY6ag/tAEQ5YgGdH0qKnwZiE/jzBHdAAO6rPHe0sRStxwxcERZg+R39bxzni5tvm92gYFutTs6BRyM9xAu+3T2mto/lq02syhUms= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=google.com; spf=pass smtp.mailfrom=flex--seanjc.bounces.google.com; dkim=pass (2048-bit key) header.d=google.com header.i=@google.com header.b=G+YpiXtY; arc=none smtp.client-ip=209.85.210.201 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=google.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=flex--seanjc.bounces.google.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=google.com header.i=@google.com header.b="G+YpiXtY" Received: by mail-pf1-f201.google.com with SMTP id d2e1a72fcca58-7b991765fb5so1525268b3a.1 for ; Thu, 13 Nov 2025 15:37:49 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20230601; t=1763077069; x=1763681869; darn=vger.kernel.org; h=cc:to:from:subject:message-id:mime-version:date:reply-to:from:to:cc :subject:date:message-id:reply-to; bh=xkbtepi4QW5KzyC1xYbQMyK3Quk4zx3aODNb7TaxfU4=; b=G+YpiXtYtBrPyA5SUwm7NkHEpmRHio6/kTWLJAIugl4pE+j1SZHNy1GMWkG8Nop/FZ IDeuV/yYVbopkKuRz/+3kT1N6+4+MFiNPca06t6MvH3G4w4L2LAj4BMtQosmt67MJZAd M7vK+FsEaiWkaFq7ZgNfR4535NcdTv540fvyGeUPeIB0axJVIODrx5RQQhiVnXrZSrfT CL3cOxYmQNqCqrKrTXL9+SCNxlHlGerI1+qhIA+sS6OkfBLJHijMPjbisLbmjCUXFK1N z9Gm8MVnQxcjvfjLVVuYLuLU6R5ulQc0WM2RLri5WkJr32yV8j6gGJQOhlVNQpi2Yib/ Mc2w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1763077069; x=1763681869; h=cc:to:from:subject:message-id:mime-version:date:reply-to :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=xkbtepi4QW5KzyC1xYbQMyK3Quk4zx3aODNb7TaxfU4=; b=SFvTIqPggkpZZT566LV9OO99fKGy2OZCxD1v+z6iX0HnkpPiRSXzPBWac1vINTuzCd Sm/LIoeX+MLTtZNSdU2YVpb2wtJ20vfEVyUm7dVSjCACbCniCPkqEDWd5lDFOjPKhCCt TYagfgcIqNlxkwgCGnMvGiBMT26I3sSpvDZOZzD/dz/7sx9cQyxyADcUIwKSzjxXR74T Ch/pIavRQ663ae/Eh8WnXc5Ge8/V0gDHtFYwbhSnmRVCmQ4e8NqcAdk3gxPGQ+0e6+aq Udh/F9XLj2L8sa6taFZbbzrnfWcc79z1rBYO/NirwckymzR4XrwUvv+q4xI7kDFJs0vz sq/w== X-Forwarded-Encrypted: i=1; AJvYcCXq/EFcPyYFEtkTMwiUIcDoL74SXbn+Qe+xnkMoQ06Dl3aZQq8YgBIC3SCLi0IcjXC7rZH7oGxzM/vE4NU=@vger.kernel.org X-Gm-Message-State: AOJu0Yzr1g6fmJlQjFY7JEC7fB8jvEBNEOS57A7J047HF90QeZgap4nm zberkQqEooZoQfu4zI3E4RRQMogXYXw25PUU3qo592natL/kASiPl4zl3Xzrj0OCA08y4pkrPgw F8HceCg== X-Google-Smtp-Source: AGHT+IE58RfmRBXykqVVjWdyfAqYsq5Vc+2tQaoSIgGjVQwUWponWGs2XzQBYvFCrtYDYQ+KnLfCzVvOkDI= X-Received: from pgna19.prod.google.com ([2002:a63:7053:0:b0:bc3:57f1:bc8e]) (user=seanjc job=prod-delivery.src-stubby-dispatcher) by 2002:a05:6a20:7349:b0:34e:1009:4216 with SMTP id adf61e73a8af0-35ba057f8ebmr1598941637.24.1763077068543; Thu, 13 Nov 2025 15:37:48 -0800 (PST) Reply-To: Sean Christopherson Date: Thu, 13 Nov 2025 15:37:37 -0800 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 X-Mailer: git-send-email 2.52.0.rc1.455.g30608eb744-goog Message-ID: <20251113233746.1703361-1-seanjc@google.com> Subject: [PATCH v5 0/9] x86/bugs: KVM: L1TF and MMIO Stale Data cleanups From: Sean Christopherson To: Sean Christopherson , Paolo Bonzini , Thomas Gleixner , Borislav Petkov , Peter Zijlstra , Josh Poimboeuf Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Pawan Gupta , Brendan Jackman Content-Type: text/plain; charset="UTF-8" Clean up KVM's handling of L1TF and MMIO Stale data, as the code has bit rotted a bit and is harder than it should be to understand, and has a few warts. TL;DR: - Unify L1TF flushing under per-CPU variable - Bury L1TF L1D flushing under CONFIG_CPU_MITIGATIONS=y - Move MMIO Stale Data into asm, and do VERW at most once per VM-Enter To allow VMX to use ALTERNATIVE_2 to select slightly different flows for doing VERW, tweak the low lever macros in nospec-branch.h to define the instruction sequence, and then wrap it with __stringify() as needed. As before, the non-VMX code is lightly tested (but there's far less chance for breakage there). For the VMX code, I verified the KVM side of things by hacking the code to force/clear various mitigations, and using ud2 to confirm the right path got selected. v5: - Collect reviews and acks. - Add/improve comments for various macros and flows. [Everyone] - s/CLEAR_CPU_BUFFERS_SEQ/VERW [Pawan, Boris] - Use the on-stack copy of @flags instead of stashing information in RFLAGS' arithmetic flags. [Boris] - Fix typos (hopefully). [Boris] v4: - https://lore.kernel.org/all/20251031003040.3491385-1-seanjc@google.com - Drop the patch to fallback to handling the MMIO mitigation if vmx_l1d_flush() doesn't flush, and instead use Pawan's approach of decoupling the two entirely. - Replace the static branch with X86_FEATURE_CLEAR_CPU_BUF_MMIO so that it can be referenced in ALTERNATIVE macros. - Decouple X86_FEATURE_CLEAR_CPU_BUF_VM from X86_FEATURE_CLEAR_CPU_BUF_MMIO (though they still interact and can both be set) v3: - https://lore.kernel.org/all/20251016200417.97003-1-seanjc@google.com - [Pawan's series] https://lore.kernel.org/all/20251029-verw-vm-v1-0-babf9b961519@linux.intel.com - Put the "raw" variant in KVM, dress it up with KVM's "request" terminology, and add a comment explaining why _KVM_ knows its usage doesn't need to disable virtualization. - Add the prep patches. v2: - https://lore.kernel.org/all/20251015-b4-l1tf-percpu-v2-1-6d7a8d3d40e9@google.com - Moved the bit back to irq_stat - Fixed DEBUG_PREEMPT issues by adding a _raw variant v1: https://lore.kernel.org/r/20251013-b4-l1tf-percpu-v1-1-d65c5366ea1a@google.com Brendan Jackman (1): KVM: x86: Unify L1TF flushing under per-CPU variable Pawan Gupta (1): x86/bugs: Use VM_CLEAR_CPU_BUFFERS in VMX as well Sean Christopherson (7): KVM: VMX: Use on-stack copy of @flags in __vmx_vcpu_run() x86/bugs: Decouple ALTERNATIVE usage from VERW macro definition x86/bugs: Use an x86 feature to track the MMIO Stale Data mitigation KVM: VMX: Handle MMIO Stale Data in VM-Enter assembly via ALTERNATIVES_2 x86/bugs: KVM: Move VM_CLEAR_CPU_BUFFERS into SVM as SVM_CLEAR_CPU_BUFFERS KVM: VMX: Bundle all L1 data cache flush mitigation code together KVM: VMX: Disable L1TF L1 data cache flush if CONFIG_CPU_MITIGATIONS=n arch/x86/include/asm/cpufeatures.h | 5 + arch/x86/include/asm/hardirq.h | 4 +- arch/x86/include/asm/kvm_host.h | 3 - arch/x86/include/asm/nospec-branch.h | 25 ++- arch/x86/kernel/cpu/bugs.c | 22 +-- arch/x86/kvm/mmu/mmu.c | 2 +- arch/x86/kvm/mmu/spte.c | 2 +- arch/x86/kvm/svm/vmenter.S | 6 +- arch/x86/kvm/vmx/nested.c | 2 +- arch/x86/kvm/vmx/run_flags.h | 10 +- arch/x86/kvm/vmx/vmenter.S | 29 ++-- arch/x86/kvm/vmx/vmx.c | 235 ++++++++++++++------------- arch/x86/kvm/x86.c | 6 +- arch/x86/kvm/x86.h | 14 ++ 14 files changed, 193 insertions(+), 172 deletions(-) base-commit: 16ec4fb4ac95d878b879192d280db2baeec43272 -- 2.52.0.rc1.455.g30608eb744-goog