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From: Akhil P Oommen <akhilpo@oss.qualcomm.com>
To: Rob Clark <robin.clark@oss.qualcomm.com>,
	Bjorn Andersson <andersson@kernel.org>,
	Konrad Dybcio <konradybcio@kernel.org>,
	Sean Paul <sean@poorly.run>, Dmitry Baryshkov <lumag@kernel.org>,
	Abhinav Kumar <abhinav.kumar@linux.dev>,
	Jessica Zhang <jesszhan0024@gmail.com>,
	Marijn Suijten <marijn.suijten@somainline.org>,
	David Airlie <airlied@gmail.com>, Simona Vetter <simona@ffwll.ch>,
	Jonathan Marek <jonathan@marek.ca>,
	Jordan Crouse <jordan@cosmicpenguin.net>,
	Will Deacon <will@kernel.org>,
	Robin Murphy <robin.murphy@arm.com>,
	Joerg Roedel <joro@8bytes.org>, Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Maarten Lankhorst <maarten.lankhorst@linux.intel.com>,
	Maxime Ripard <mripard@kernel.org>,
	Thomas Zimmermann <tzimmermann@suse.de>,
	Connor Abbott <cwabbott0@gmail.com>
Cc: linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org,
	dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org,
	linux-arm-kernel@lists.infradead.org, iommu@lists.linux.dev,
	devicetree@vger.kernel.org,
	Akhil P Oommen <akhilpo@oss.qualcomm.com>,
	Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Subject: [PATCH v3 06/20] drm/msm/adreno: Move gbif_halt() to adreno_gpu_func
Date: Fri, 14 Nov 2025 04:59:03 +0530	[thread overview]
Message-ID: <20251114-kaana-gpu-support-v3-6-92300c7ec8ff@oss.qualcomm.com> (raw)
In-Reply-To: <20251114-kaana-gpu-support-v3-0-92300c7ec8ff@oss.qualcomm.com>

Move the gbif halt fn to adreno_gpu_func so that we can call different
implementation from common code. This will come handy when we implement
A8x layer.

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Signed-off-by: Akhil P Oommen <akhilpo@oss.qualcomm.com>
---
 drivers/gpu/drm/msm/adreno/a6xx_gmu.c   | 4 ++--
 drivers/gpu/drm/msm/adreno/a6xx_gpu.c   | 7 +++++--
 drivers/gpu/drm/msm/adreno/adreno_gpu.h | 1 +
 3 files changed, 8 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gmu.c b/drivers/gpu/drm/msm/adreno/a6xx_gmu.c
index 605bb55de8d5..306fc08492e4 100644
--- a/drivers/gpu/drm/msm/adreno/a6xx_gmu.c
+++ b/drivers/gpu/drm/msm/adreno/a6xx_gmu.c
@@ -1053,7 +1053,7 @@ static void a6xx_gmu_force_off(struct a6xx_gmu *gmu)
 	/* Halt the gmu cm3 core */
 	gmu_write(gmu, REG_A6XX_GMU_CM3_SYSRESET, 1);
 
-	a6xx_bus_clear_pending_transactions(adreno_gpu, true);
+	adreno_gpu->funcs->bus_halt(adreno_gpu, true);
 
 	/* Reset GPU core blocks */
 	a6xx_gpu_sw_reset(gpu, true);
@@ -1225,7 +1225,7 @@ static void a6xx_gmu_shutdown(struct a6xx_gmu *gmu)
 	if (ret)
 		goto force_off;
 
-	a6xx_bus_clear_pending_transactions(adreno_gpu, a6xx_gpu->hung);
+	adreno_gpu->funcs->bus_halt(adreno_gpu, a6xx_gpu->hung);
 
 	/* tell the GMU we want to slumber */
 	ret = a6xx_gmu_notify_slumber(gmu);
diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
index e9a0ee1262cc..9c6af226b076 100644
--- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
+++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
@@ -1580,7 +1580,7 @@ static void a6xx_recover(struct msm_gpu *gpu)
 
 	if (adreno_has_gmu_wrapper(adreno_gpu)) {
 		/* Drain the outstanding traffic on memory buses */
-		a6xx_bus_clear_pending_transactions(adreno_gpu, true);
+		adreno_gpu->funcs->bus_halt(adreno_gpu, true);
 
 		/* Reset the GPU to a clean state */
 		a6xx_gpu_sw_reset(gpu, true);
@@ -2291,7 +2291,7 @@ static int a6xx_pm_suspend(struct msm_gpu *gpu)
 	mutex_lock(&a6xx_gpu->gmu.lock);
 
 	/* Drain the outstanding traffic on memory buses */
-	a6xx_bus_clear_pending_transactions(adreno_gpu, true);
+	adreno_gpu->funcs->bus_halt(adreno_gpu, true);
 
 	if (adreno_is_a619_holi(adreno_gpu))
 		a6xx_sptprac_disable(gmu);
@@ -2659,6 +2659,7 @@ const struct adreno_gpu_funcs a6xx_gpu_funcs = {
 	},
 	.init = a6xx_gpu_init,
 	.get_timestamp = a6xx_gmu_get_timestamp,
+	.bus_halt = a6xx_bus_clear_pending_transactions,
 };
 
 const struct adreno_gpu_funcs a6xx_gmuwrapper_funcs = {
@@ -2689,6 +2690,7 @@ const struct adreno_gpu_funcs a6xx_gmuwrapper_funcs = {
 	},
 	.init = a6xx_gpu_init,
 	.get_timestamp = a6xx_get_timestamp,
+	.bus_halt = a6xx_bus_clear_pending_transactions,
 };
 
 const struct adreno_gpu_funcs a7xx_gpu_funcs = {
@@ -2721,4 +2723,5 @@ const struct adreno_gpu_funcs a7xx_gpu_funcs = {
 	},
 	.init = a6xx_gpu_init,
 	.get_timestamp = a6xx_gmu_get_timestamp,
+	.bus_halt = a6xx_bus_clear_pending_transactions,
 };
diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.h b/drivers/gpu/drm/msm/adreno/adreno_gpu.h
index 2c8b38eae7b6..19a1a1f699bc 100644
--- a/drivers/gpu/drm/msm/adreno/adreno_gpu.h
+++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.h
@@ -77,6 +77,7 @@ struct adreno_gpu_funcs {
 	struct msm_gpu_funcs base;
 	struct msm_gpu *(*init)(struct drm_device *dev);
 	int (*get_timestamp)(struct msm_gpu *gpu, uint64_t *value);
+	void (*bus_halt)(struct adreno_gpu *adreno_gpu, bool gx_off);
 };
 
 struct adreno_reglist {

-- 
2.51.0


  parent reply	other threads:[~2025-11-13 23:30 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-11-13 23:28 [PATCH v3 00/20] drm/msm/adreno: Introduce Adreno 8xx family support Akhil P Oommen
2025-11-13 23:28 ` [PATCH v3 01/20] drm/msm/a6xx: Flush LRZ cache before PT switch Akhil P Oommen
2025-11-13 23:28 ` [PATCH v3 02/20] drm/msm/a6xx: Fix the gemnoc workaround Akhil P Oommen
2025-11-17 13:52   ` Konrad Dybcio
2025-11-13 23:29 ` [PATCH v3 03/20] drm/msm/a6xx: Skip dumping SCRATCH registers Akhil P Oommen
2025-11-17 14:00   ` Konrad Dybcio
2025-11-17 15:44     ` Rob Clark
2025-11-13 23:29 ` [PATCH v3 04/20] drm/msm/adreno: Common-ize PIPE definitions Akhil P Oommen
2025-11-13 23:29 ` [PATCH v3 05/20] drm/msm/adreno: Move adreno_gpu_func to catalogue Akhil P Oommen
2025-11-13 23:29 ` Akhil P Oommen [this message]
2025-11-13 23:29 ` [PATCH v3 07/20] drm/msm/adreno: Add MMU fault handler to adreno_gpu_func Akhil P Oommen
2025-11-13 23:29 ` [PATCH v3 08/20] drm/msm/a6xx: Sync latest register definitions Akhil P Oommen
2025-11-13 23:29 ` [PATCH v3 09/20] drm/msm/a6xx: Rebase GMU register offsets Akhil P Oommen
2025-11-13 23:29 ` [PATCH v3 10/20] drm/msm/a8xx: Add support for A8x GMU Akhil P Oommen
2025-11-17 14:09   ` Konrad Dybcio
2025-11-13 23:29 ` [PATCH v3 11/20] drm/msm/a6xx: Improve MX rail fallback in RPMH vote init Akhil P Oommen
2025-11-17 14:11   ` Konrad Dybcio
2025-11-13 23:29 ` [PATCH v3 12/20] drm/msm/a6xx: Share dependency vote table with GMU Akhil P Oommen
2025-11-13 23:29 ` [PATCH v3 13/20] drm/msm/adreno: Introduce A8x GPU Support Akhil P Oommen
2025-11-13 23:29 ` [PATCH v3 14/20] drm/msm/adreno: Support AQE engine Akhil P Oommen
2025-11-17 14:03   ` Konrad Dybcio
2025-11-13 23:29 ` [PATCH v3 15/20] drm/msm/a8xx: Add support for Adreno 840 GPU Akhil P Oommen
2025-11-13 23:29 ` [PATCH v3 16/20] drm/msm/adreno: Do CX GBIF config before GMU start Akhil P Oommen
2025-11-13 23:29 ` [PATCH v3 17/20] drm/msm/a8xx: Add support for Adreno X2-85 GPU Akhil P Oommen
2025-11-17 14:06   ` Konrad Dybcio
2025-11-13 23:29 ` [PATCH v3 18/20] dt-bindings: arm-smmu: Add Kaanapali and Glymur GPU SMMU Akhil P Oommen
2025-11-14  7:47   ` Krzysztof Kozlowski
2025-11-13 23:29 ` [PATCH v3 19/20] dt-bindings: display/msm/gmu: Add Adreno 840 GMU Akhil P Oommen
2025-11-13 23:29 ` [PATCH v3 20/20] dt-bindings: display/msm/gmu: Add Adreno X2-85 GMU Akhil P Oommen
2025-11-15  1:09 ` [PATCH v3 00/20] drm/msm/adreno: Introduce Adreno 8xx family support Rob Clark

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