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Sun, 16 Nov 2025 09:17:27 -0800 (PST) Received: from hu-mohs-hyd.qualcomm.com ([202.46.23.25]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2985c2b1055sm114415105ad.59.2025.11.16.09.17.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 16 Nov 2025 09:17:26 -0800 (PST) From: Mohammad Rafi Shaik To: Bjorn Andersson , Linus Walleij , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Srinivas Kandagatla Cc: linux-arm-msm@vger.kernel.org, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, kernel@oss.qualcomm.com, ajay.nandam@oss.qualcomm.com, ravi.hothi@oss.qualcomm.com Subject: [PATCH v1 1/2] dt-bindings: pinctrl: qcom,sa8775p-lpass-lpi-pinctrl: Add SA8775P LPASS pinctrl Date: Sun, 16 Nov 2025 22:46:55 +0530 Message-Id: <20251116171656.3105461-2-mohammad.rafi.shaik@oss.qualcomm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20251116171656.3105461-1-mohammad.rafi.shaik@oss.qualcomm.com> References: <20251116171656.3105461-1-mohammad.rafi.shaik@oss.qualcomm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUxMTE2MDE0MyBTYWx0ZWRfX2LfbE+faf30t sFtbFla0bHSAfxTKAN3Ko4yPRIJG+Dq6YlAibcLQ7CF5xGbKxge8l3j/7ukyxOu1NkXdb8Z/wxZ gd2dsyA+U1XIbqLWPRbnpM+3DAwDK9AH0ACFjBrbf9RvXaj3tqvxqzrvLT0ujYWLTMUhgR7MVpt pfVbAjn0ZEMqsGnq43uGKsR64t53u1jOk96064IdHnru6o9elC7Mghylg00ueOYoesy9mHw1kSw ZyQQwSrMvz1plZOJcZk0KwsPox88VwlaYi9h1hW8moS6V3ijZ3TrUpZY+YRxRUvufSeKaIs0vrZ tRRtpn1iWcdDAdB/Zh9z/onSW/Y/dJGncsI/CXvXUGKGCTawy1oTSxHFIOoPbE643bD7W8mDw7P dP7t7Muae78L38T5fEixxVuZ/KUeSw== X-Authority-Analysis: v=2.4 cv=UctciaSN c=1 sm=1 tr=0 ts=691a0728 cx=c_pps a=cmESyDAEBpBGqyK7t0alAg==:117 a=ZePRamnt/+rB5gQjfz0u9A==:17 a=6UeiqGixMTsA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=gEfo2CItAAAA:8 a=EUspDBNiAAAA:8 a=CaveSyEksWnKhASb3GUA:9 a=1OuFwYUASf3TG4hYMiVC:22 a=sptkURWiP4Gy88Gu7hUp:22 X-Proofpoint-ORIG-GUID: mcs9zZEL3kF3N03oxZ3zaCcNJnBGBjGE X-Proofpoint-GUID: mcs9zZEL3kF3N03oxZ3zaCcNJnBGBjGE X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.9,FMLib:17.12.100.49 definitions=2025-11-16_06,2025-11-13_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 spamscore=0 phishscore=0 lowpriorityscore=0 malwarescore=0 adultscore=0 priorityscore=1501 suspectscore=0 impostorscore=0 clxscore=1015 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2510240001 definitions=main-2511160143 Add bindings for the pin controller in Low Power Audio SubSystem (LPASS) of Qualcomm SA8775P SoC. Signed-off-by: Mohammad Rafi Shaik --- .../qcom,sa8775p-lpass-lpi-pinctrl.yaml | 106 ++++++++++++++++++ 1 file changed, 106 insertions(+) create mode 100644 Documentation/devicetree/bindings/pinctrl/qcom,sa8775p-lpass-lpi-pinctrl.yaml diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sa8775p-lpass-lpi-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sa8775p-lpass-lpi-pinctrl.yaml new file mode 100644 index 000000000000..01a56dbeaeff --- /dev/null +++ b/Documentation/devicetree/bindings/pinctrl/qcom,sa8775p-lpass-lpi-pinctrl.yaml @@ -0,0 +1,106 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pinctrl/qcom,sa8775p-lpass-lpi-pinctrl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm SA8775P SoC LPASS LPI TLMM + +maintainers: + - Srinivas Kandagatla + +description: + Top Level Mode Multiplexer pin controller in the Low Power Audio SubSystem + (LPASS) Low Power Island (LPI) of Qualcomm SA8775P SoC. + +properties: + compatible: + const: qcom,sa8775p-lpass-lpi-pinctrl + + reg: + items: + - description: LPASS LPI TLMM Control and Status registers + + clocks: + items: + - description: LPASS Core voting clock + - description: LPASS Audio voting clock + + clock-names: + items: + - const: core + - const: audio + +patternProperties: + "-state$": + oneOf: + - $ref: "#/$defs/qcom-sa8775p-lpass-state" + - patternProperties: + "-pins$": + $ref: "#/$defs/qcom-sa8775p-lpass-state" + additionalProperties: false + +$defs: + qcom-sa8775p-lpass-state: + type: object + description: + Pinctrl node's client devices use subnodes for desired pin configuration. + Client device subnodes use below standard properties. + $ref: qcom,lpass-lpi-common.yaml#/$defs/qcom-tlmm-state + unevaluatedProperties: false + + properties: + pins: + description: + List of gpio pins affected by the properties specified in this + subnode. + items: + pattern: "^gpio([0-9]|1[0-9]|2[0-2])$" + + function: + enum: [dmic1_clk, dmic1_data, dmic2_clk, dmic2_data, dmic3_clk, + dmic3_data, dmic4_clk, dmic4_data, ext_mclk1_a, ext_mclk1_b, + ext_mclk1_c, ext_mclk1_d, ext_mclk1_e, i2s1_clk, i2s1_data, + i2s1_ws, i2s2_clk, i2s2_data, i2s2_ws, i2s3_clk, i2s3_data, + i2s3_ws, i2s4_clk, i2s4_data, i2s4_ws, qua_mi2s_sclk, + qua_mi2s_data, qua_mi2s_ws, slimbus_clk, slimbus_data, + swr_rx_clk, swr_rx_data, swr_tx_clk, swr_tx_data, wsa_swr_clk, + wsa_swr_data, wsa2_swr_clk, wsa2_swr_data] + description: + Specify the alternative function to be configured for the specified + pins. + +allOf: + - $ref: qcom,lpass-lpi-common.yaml# + +required: + - compatible + - reg + - clocks + - clock-names + +unevaluatedProperties: false + +examples: + - | + #include + + lpass_tlmm: pinctrl@3440000 { + compatible = "qcom,sa8775p-lpass-lpi-pinctrl"; + reg = <0x0 0x03440000 0x0 0x20000>; + + clocks = <&q6prmcc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&q6prmcc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>; + clock-names = "core", "audio"; + + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&lpass_tlmm 0 0 23>; + + tx-swr-sleep-clk-state { + pins = "gpio0"; + function = "swr_tx_clk"; + drive-strength = <2>; + bias-pull-down; + }; + }; -- 2.34.1