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[83.233.6.197]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-59580405693sm3023727e87.76.2025.11.17.01.05.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 17 Nov 2025 01:05:38 -0800 (PST) From: Marcus Folkesson Date: Mon, 17 Nov 2025 10:05:00 +0100 Subject: [PATCH RESEND v3 3/5] i2c: davinci: calculate bus freq from Hz instead of kHz Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20251117-i2c-mux-v3-3-696c83e3505a@gmail.com> References: <20251117-i2c-mux-v3-0-696c83e3505a@gmail.com> In-Reply-To: <20251117-i2c-mux-v3-0-696c83e3505a@gmail.com> To: Wolfram Sang , Peter Rosin , Michael Hennerich , Bartosz Golaszewski , Andi Shyti Cc: linux-i2c@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Marcus Folkesson , Bartosz Golaszewski X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=openpgp-sha256; l=2849; i=marcus.folkesson@gmail.com; h=from:subject:message-id; bh=v2z8hyK1XpH9sRNEh0FTDATeNOoSf0j273yYmUHhCVg=; b=owEBbQKS/ZANAwAKAYiATm9ZXVIyAcsmYgBpGuVPakARFkpRXLd2kbW0oIVh4Oo/J5FJfs9vS anUBgOwm1SJAjMEAAEKAB0WIQQFUaLotmy1TWTBLGWIgE5vWV1SMgUCaRrlTwAKCRCIgE5vWV1S MtjHD/9Xc/qHnz2R6dEBP2Ga36wZqa2NXUUudlDk+Xq88nyEhsswUc/TN24vSq3bRmDkGlx6WsM nsZTYmDMNmbVMTvVQRMpeYuPYDjaDOhfhq/uZQQnButVC6RQ/ywFiiGjf/jY+Z0DK1vKB2IJkUY A3foxz9SXndjYgZ81G4ny6E3iyGRSva38/fq6r188Ky9IyyqARqR132g2fWA/aTPLKJYRq37OjO HCocln7DTWZU7OYEC6CzoygWXaoU+wm+PXOiC/85JL7sDNd86s1K2PQPo8tnaRYe+A8mQsK62Ox fuQoOd3/R1viHSaBfOT9g8aCAXPDXp9IwB7tIblmFUdQqxWiH/rNCEUtbPbSLS06rS0MWBlzmTT We4/6CPlM0MQMd20tYck070c38uZd5VEedWp5P97JyLnwsTutHtBkZJO38khQZdyBvEM53X03Jw KsIpMMtNTF6bn4HqNNBh6FCiWFbNpISR1JeKG4ikTX3NEEEBn3BrErWUIWgwqu4lAtWpC97yar8 KEtYTbIuZo9s//8J3qjgTi/EEnfsxWtdv44/zji41hBHQULvVMoA0+AQ1vLNeGuNfgcFV6b+sJk veuAQhZqC+yzlE+MKj7j3RaC3YVDNaZRlC8a2LWDfGFHHQl+9eXcoDjMVKCfTtZEjWcLeScQjTT ZTtpcB7zsgCM3uQ== X-Developer-Key: i=marcus.folkesson@gmail.com; a=openpgp; fpr=AB91D46C7E0F6E6FB2AB640EC0FE25D598F6C127 The bus frequency is unnecessarily converted between Hz and kHz in several places. This is probably an old legacy from the old times (pre-devicetrees) when the davinci_i2c_platform_data took the bus_freq in kHz. Stick to Hz. Reviewed-by: Bartosz Golaszewski Signed-off-by: Marcus Folkesson --- drivers/i2c/busses/i2c-davinci.c | 18 ++++++++---------- 1 file changed, 8 insertions(+), 10 deletions(-) diff --git a/drivers/i2c/busses/i2c-davinci.c b/drivers/i2c/busses/i2c-davinci.c index 6a3d4e9e07f4..82f295619c4d 100644 --- a/drivers/i2c/busses/i2c-davinci.c +++ b/drivers/i2c/busses/i2c-davinci.c @@ -117,8 +117,6 @@ /* timeout for pm runtime autosuspend */ #define DAVINCI_I2C_PM_TIMEOUT 1000 /* ms */ -#define DAVINCI_I2C_DEFAULT_BUS_FREQ 100 - struct davinci_i2c_dev { struct device *dev; void __iomem *base; @@ -134,8 +132,8 @@ struct davinci_i2c_dev { #ifdef CONFIG_CPU_FREQ struct notifier_block freq_transition; #endif - /* standard bus frequency (kHz) */ - unsigned int bus_freq; + /* standard bus frequency */ + unsigned int bus_freq_hz; /* Chip has a ICPFUNC register */ bool has_pfunc; }; @@ -209,16 +207,16 @@ static void i2c_davinci_calc_clk_dividers(struct davinci_i2c_dev *dev) if (device_is_compatible(dev->dev, "ti,keystone-i2c")) d = 6; - clk = ((input_clock / (psc + 1)) / (dev->bus_freq * 1000)); + clk = ((input_clock / (psc + 1)) / (dev->bus_freq_hz)); /* Avoid driving the bus too fast because of rounding errors above */ - if (input_clock / (psc + 1) / clk > dev->bus_freq * 1000) + if (input_clock / (psc + 1) / clk > dev->bus_freq_hz) clk++; /* * According to I2C-BUS Spec 2.1, in FAST-MODE LOW period should be at * least 1.3uS, which is not the case with 50% duty cycle. Driving HIGH * to LOW ratio as 1 to 2 is more safe. */ - if (dev->bus_freq > 100) + if (dev->bus_freq_hz > 100000) clkl = (clk << 1) / 3; else clkl = (clk >> 1); @@ -269,7 +267,7 @@ static int i2c_davinci_init(struct davinci_i2c_dev *dev) davinci_i2c_read_reg(dev, DAVINCI_I2C_CLKL_REG)); dev_dbg(dev->dev, "CLKH = %d\n", davinci_i2c_read_reg(dev, DAVINCI_I2C_CLKH_REG)); - dev_dbg(dev->dev, "bus_freq = %dkHz\n", dev->bus_freq); + dev_dbg(dev->dev, "bus_freq_hz = %dHz\n", dev->bus_freq_hz); /* Take the I2C module out of reset: */ @@ -761,9 +759,9 @@ static int davinci_i2c_probe(struct platform_device *pdev) r = device_property_read_u32(&pdev->dev, "clock-frequency", &prop); if (r) - prop = DAVINCI_I2C_DEFAULT_BUS_FREQ; + prop = I2C_MAX_STANDARD_MODE_FREQ; - dev->bus_freq = prop / 1000; + dev->bus_freq_hz = prop; dev->has_pfunc = device_property_present(&pdev->dev, "ti,has-pfunc"); -- 2.51.2