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Mon, 24 Nov 2025 09:09:05 +0000 X-MS-Exchange-Authentication-Results: spf=softfail (sender IP is 91.26.50.189) smtp.mailfrom=phytec.de; dkim=none (message not signed) header.d=none;dmarc=fail action=quarantine header.from=phytec.de; Received-SPF: SoftFail (protection.outlook.com: domain of transitioning phytec.de discourages use of 91.26.50.189 as permitted sender) Received: from Postix.phytec.de (91.26.50.189) by AM3PEPF0000A795.mail.protection.outlook.com (10.167.16.100) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9366.7 via Frontend Transport; Mon, 24 Nov 2025 09:09:04 +0000 Received: from ls-radium.phytec (172.25.39.17) by Postix.phytec.de (172.25.0.11) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.29; Mon, 24 Nov 2025 10:09:01 +0100 From: Daniel Schultz To: , , , , , , , , CC: , Daniel Schultz Subject: [PATCH v2 2/2] arm64: dts: ti: k3-am62a-phycore-som: Enable cpsw_mac_syscon in U-Boot Date: Mon, 24 Nov 2025 01:08:42 -0800 Message-ID: <20251124090842.3377294-2-d.schultz@phytec.de> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20251124090842.3377294-1-d.schultz@phytec.de> References: <20251124090842.3377294-1-d.schultz@phytec.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-ClientProxiedBy: Postix.phytec.de (172.25.0.11) To Postix.phytec.de (172.25.0.11) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: AM3PEPF0000A795:EE_|AS4P195MB1480:EE_ X-MS-Office365-Filtering-Correlation-Id: 40c6baa3-ec85-4838-774f-08de2b391d80 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|82310400026|1800799024|36860700013; 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X-OriginatorOrg: phytec.de X-MS-Exchange-CrossTenant-OriginalArrivalTime: 24 Nov 2025 09:09:04.0883 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 40c6baa3-ec85-4838-774f-08de2b391d80 X-MS-Exchange-CrossTenant-Id: e609157c-80e2-446d-9be3-9c99c2399d29 X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=e609157c-80e2-446d-9be3-9c99c2399d29;Ip=[91.26.50.189];Helo=[Postix.phytec.de] X-MS-Exchange-CrossTenant-AuthSource: AM3PEPF0000A795.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: AS4P195MB1480 Add the "bootph-all" property to cpsw_mac_syscon. This fuse region contains the internal MAC address. Without this syscon node enabled, this interface will get a random MAC during network boot. This is problematic because the AM62Ax network boot is using BOOTP protocol for some binaries and this protocol does not support dynamic lease expiration. Therefore, the DHCP server can run out of free IP addresses. Signed-off-by: Daniel Schultz --- Changes in v2: Moved changes from k2-am62a-main.dsti to k3-am62a-phycore-som.dtsi arch/arm64/boot/dts/ti/k3-am62a-phycore-som.dtsi | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-am62a-phycore-som.dtsi b/arch/arm64/boot/dts/ti/k3-am62a-phycore-som.dtsi index b3d012a5a26a..7f00576a4bd2 100644 --- a/arch/arm64/boot/dts/ti/k3-am62a-phycore-som.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62a-phycore-som.dtsi @@ -197,6 +197,11 @@ &cpsw_port1 { bootph-all; }; + +&cpsw_mac_syscon { + bootph-all; +}; + &cpsw3g_mdio { pinctrl-names = "default"; pinctrl-0 = <&main_mdio1_pins_default>; -- 2.25.1