From: Wei Liu <wei.liu@kernel.org>
To: Anirudh Raybharam <anirudh@anirudhrb.com>
Cc: kys@microsoft.com, haiyangz@microsoft.com, wei.liu@kernel.org,
decui@microsoft.com, longli@microsoft.com,
catalin.marinas@arm.com, will@kernel.org, maz@kernel.org,
tglx@linutronix.de, Arnd Bergmann <arnd@arndb.de>,
akpm@linux-foundation.org, agordeev@linux.ibm.com,
guoweikang.kernel@gmail.com, osandov@fb.com, bsz@amazon.de,
linux-hyperv@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-arch@vger.kernel.org
Subject: Re: [PATCH 2/3] irqchip/gic-v3: allocate one SGI for MSHV
Date: Wed, 26 Nov 2025 22:25:17 +0000 [thread overview]
Message-ID: <20251126222517.GA1387324@liuwe-devbox-debian-v2.local> (raw)
In-Reply-To: <20251125170124.2443340-3-anirudh@anirudhrb.com>
On Tue, Nov 25, 2025 at 05:01:23PM +0000, Anirudh Raybharam wrote:
> From: Anirudh Rayabharam <anirudh@anirudhrb.com>
[...]
> /* SMCCC hypercall parameters */
> #define HV_SMCCC_FUNC_NUMBER 1
> #define HV_FUNC_ID ARM_SMCCC_CALL_VAL( \
> diff --git a/drivers/irqchip/irq-gic-v3.c b/drivers/irqchip/irq-gic-v3.c
> index 3de351e66ee8..56013dd0564c 100644
> --- a/drivers/irqchip/irq-gic-v3.c
> +++ b/drivers/irqchip/irq-gic-v3.c
> @@ -35,6 +35,7 @@
> #include <asm/exception.h>
> #include <asm/smp_plat.h>
> #include <asm/virt.h>
> +#include <asm/mshyperv.h>
>
> #include "irq-gic-common.h"
>
> @@ -1456,8 +1457,24 @@ static void __init gic_smp_init(void)
> .fwnode = gic_data.fwnode,
> .param_count = 1,
> };
> + /* Register all 8 non-secure SGIs */
> + const int NR_SMP_SGIS = 8;
> + int nr_sgis = NR_SMP_SGIS;
> int base_sgi;
>
> + /*
> + * Allocate one more SGI for use by Hyper-V. This is only needed when
> + * Linux is running in a parent partition. Hyper-V will use this interrupt
> + * to notify the parent partition of intercepts.
> + *
> + * When running on Hyper-V, it is okay to use SGIs 8-15. They're not reserved
> + * for secure firmware.
> + */
> +#if IS_ENABLED(CONFIG_HYPERV)
> + if (hv_parent_partition())
> + nr_sgis += 1;
> +#endif
> +
This is far too intrusive. Let's take Marc's feedback and work with the
hypervisor team to resolve this properly.
Wei
next prev parent reply other threads:[~2025-11-26 22:25 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-11-25 17:01 [PATCH 0/3] MSHV intercepts support on arm64 Anirudh Raybharam
2025-11-25 17:01 ` [PATCH 1/3] arm64: hyperv: move hyperv detection earlier in boot Anirudh Raybharam
2025-11-25 21:19 ` kernel test robot
2025-11-27 10:36 ` kernel test robot
2025-11-25 17:01 ` [PATCH 2/3] irqchip/gic-v3: allocate one SGI for MSHV Anirudh Raybharam
2025-11-25 18:01 ` Marc Zyngier
2025-11-26 8:51 ` Anirudh Rayabharam
2025-11-26 9:02 ` Marc Zyngier
2025-11-26 10:46 ` Anirudh Rayabharam
2025-11-26 21:27 ` Marc Zyngier
2025-11-27 6:26 ` Anirudh Rayabharam
2025-11-26 22:25 ` Wei Liu [this message]
2025-11-27 10:36 ` kernel test robot
2025-11-25 17:01 ` [PATCH 3/3] mshv: add support for VMEXIT interrupts on aarch64 Anirudh Raybharam
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